- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄98012 > MC68HC05L16CFU (FREESCALE SEMICONDUCTOR INC) 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQFP80 PDF資料下載
參數(shù)資料
| 型號： | MC68HC05L16CFU |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | PLASTIC, QFP-80 |
| 文件頁數(shù)： | 127/146頁 |
| 文件大?。?/td> | 852K |
| 代理商： | MC68HC05L16CFU |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁當(dāng)前第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁
Timer 1
MC68HC05L16 MC68HC705L16 Data Sheet, Rev. 4.1
Freescale Semiconductor
81
IEDG — Input Edge
The value of the input edge determines which level transition on the TCAP pin will trigger free-running
counter transfer to the input capture register.
Reset does not affect the IEDG bit.
0 = Negative edge
1 = Positive edge
Bits 2–4 — Not Used
Always read logic 0
OLVL — Not Used
Always read logic 0
9.2.5 Timer Status Register
The TSR is a read-only register containing three status flag bits.
ICF — Input Capture Flag
0 = Flag cleared when TSR and input capture low register ($15) are accessed
1 = Flag set when selected polarity edge is sensed by input capture edge detector
OC1F — Output Compare 1 Flag
0 = Flag cleared when TSR and output compare low register ($17) are accessed
1 = Flag set when output compare register contents match the free-running counter contents
TOF — Timer Overflow Flag
0 = Flag cleared when TSR and counter low register ($19) are accessed
1 = Flag set when free-running counter transition from $FFFF to $0000 occurs
Bits 0–4 — Not Used
Always read logic 0
Accessing the timer status register satisfies the first condition required to clear status bits. The remaining
step is to access the register corresponding to the status bit.
A problem can occur when using the timer overflow function and reading the free-running counter at
random times to measure an elapsed time. Without incorporating the proper precautions into software,
the timer overflow flag could unintentionally be cleared if:
1.
The timer status register is read or written when TOF is set.
2.
The LSB of the free-running counter is read but not for the purpose of servicing the flag.
The counter alternate register at address $1A and $1B contains the same value as the free-running
counter (at address $18 and $19); therefore, this alternate register can be read at any time without
affecting the timer overflow flag in the timer status register.
Address:
$0013
Bit 7
654321
Bit 0
Read:
ICF
OC1F
TOF
00000
Write:
Reset:
U
00000
= Unimplemented
U = Unaffected
Figure 9-4. Timer Status Register (TSR)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC68HC705P9CDWR2 | 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDSO28 |
| MC68HC705V12CFNR2 | 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PQCC68 |
| MC68HC708AS48CFN | 8-BIT, EEPROM, 8.4 MHz, MICROCONTROLLER, PQCC52 |
| MC68HC711D3FNR2 | 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PQCC44 |
| MC68HC711G5CFN | 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC68HC05L16FU | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontrollers |
| MC68HC05L2 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:High-density complementary metal oxide semiconductor (HCMOS) microcontroller unit |
| MC68HC05L25 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontrollers |
| MC68HC05L25FA | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontrollers |
| MC68HC05L25PB | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontrollers |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。