參數(shù)資料
型號： MC68HC05L16CFU
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQFP80
封裝： PLASTIC, QFP-80
文件頁數(shù)： 119/146頁
文件大?。?/td> 852K
代理商： MC68HC05L16CFU
Simple Serial Peripheral Interface (SSPI)
MC68HC05L16 MC68HC705L16 Data Sheet, Rev. 4.1
74
Freescale Semiconductor
Bits 3–1 — Reserved
These bits are not used and are fixed to 0.
SPR — SSPI Clock Rate Select
This serial peripheral clock rate bit selects one of two bit rates of SCK. This bit is cleared on reset.
0 = Internal processor clock divided by 2
1 = Internal processor clock divided by 16
8.6.2 Serial Peripheral Status Register
SPIF — Serial Transfer Complete Flag
The serial peripheral data transfer complete flag bit notifies the user that a data transfer between the
MC68HC05L16 and an external device has been completed. With the completion of the data transfer,
the rising edge of the eighth pulse sets SPIF, and if SPIE is set, SSPI is generated. However, during
STOP, the interrupt request is serviced only in slave mode. STOP execution never affects the SPIF
flag or SPIE.
When SPIF is set, the ninth clock from the clock generator or from the SCK pin is inhibited.
Clearing the SPIF bit is done by a software sequence of accessing the SPSR while the SPIF bit is set
followed by accessing SPDR (8-bit shift register). This also clears the DCOL bit. While SPIF is set, all
writes to the SPDR are inhibited until SPSR is read by the CPU.
The SPIF bit is a read-only bit and is cleared on reset.
0 = Data transfer not complete
1 = Data transfer complete
DCOL — Data COLlision
The data collision bit notifies the user that an attempt was made to write or read the serial peripheral
data register while a data transfer was taking place with an external device. The transfer continues
uninterrupted; therefore, a write will be unsuccessful, and a data read will be incorrect.
A data collision only sets the DCOL bit and does not generate an SSPI interrupt. The DCOL bit
indicates only the occurrence of data collision.
Clearing the DCOL bit is done by a software sequence of accessing the SPSR while SPIF is set
followed by accessing the SPDR. Both the SPIF and DCOL bits will be cleared by this sequence.
The DCOL bit is cleared on reset.
0 = No data collision
1 = Data collision occurred
Bits 5–0 — Reserved
These bits are not used and are fixed to 0.
Address:
$000B
Bit 7
654321
Bit 0
Read:
SPIF
DCOL
000000
Write:
Reset:
00000000
= Unimplemented
Figure 8-5. Serial Peripheral Status Register (SPSR)
相關(guān)PDF資料
PDF描述
MC68HC705P9CDWR2 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDSO28
MC68HC705V12CFNR2 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PQCC68
MC68HC708AS48CFN 8-BIT, EEPROM, 8.4 MHz, MICROCONTROLLER, PQCC52
MC68HC711D3FNR2 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PQCC44
MC68HC711G5CFN 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC68HC05L16FU 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontrollers
MC68HC05L2 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:High-density complementary metal oxide semiconductor (HCMOS) microcontroller unit
MC68HC05L25 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontrollers
MC68HC05L25FA 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontrollers
MC68HC05L25PB 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontrollers
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*