參數(shù)資料
型號： MC68CK338CPV14
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 14.4 MHz, MICROCONTROLLER, PQFP144
封裝： PLASTIC, TQFP-144
文件頁數(shù)： 96/133頁
文件大?。?/td> 944K
代理商： MC68CK338CPV14
MC68CK338
MOTOROLA
MC68CK338TS/D
65
5.5.1 QSPI Pins
Seven pins are associated with the QSPI. When not needed for a QSPI function, they can be configured
as general-purpose I/O pins. The PCS0/SS pin can function as a peripheral chip select output, slave
select input, or general-purpose I/O. Refer to Table 39 for QSPI input and output pins and their func-
tions.
5.5.2 QSPI Registers
The programmer's model for the QSPI submodule consists of the QSM global and pin control registers,
four QSPI control registers, one status register, and the 80-byte QSPI RAM.
The CPU can read and write to registers and RAM. The four control registers must be initialized before
the QSPI is enabled to ensure defined operation. SPCR1 should be written last because it contains
QSPI enable bit SPE. Asserting this bit starts the QSPI. The QSPI control registers are reset to a de-
fined state and can then be changed by the CPU. Reset values are shown below each register.
Table 40 shows a memory map of the QSPI.
Writing a different value into any control register except SPCR2 while the QSPI is enabled disrupts op-
eration. SPCR2 is buffered to prevent disruption of the current serial transfer. After completion of the
current serial transfer, the new SPCR2 values become effective.
Writing the same value into any control register except SPCR2 while the QSPI is enabled has no effect
on QSPI operation. Rewriting NEWQP[3:0] in SPCR2 causes execution to restart at the designated
location.
Table 39 QSPI Pins
Pin Name(s)
Mnemonic(s)
Mode
Function
Master In Slave Out
MISO
Master
Slave
Serial data input to QSPI
Serial data output from QSPI
Master Out Slave In
MOSI
Master
Slave
Serial data output from QSPI
Serial data input to QSPI
Serial Clock
SCK
Master
Slave
Clock output from QSPI
Clock input to QSPI
Peripheral Chip Selects
PCS[3:1]
Master
Select peripherals
Peripheral Chip Select
Slave Select
PCS0
SS
Master
Slave
Selects peripheral
Causes mode fault
Initiates serial transfer
Table 40 QSPI Memory Map
Address
Name
Usage
$YFFC18
SPCR0
QSPI control register 0
$YFFC1A
SPCR1
QSPI control register 1
$YFFC1C
SPCR2
QSPI control register 2
$YFFC1E
SPCR3
QSPI control register 3
$YFFC1F
SPSR
QSPI status register
$YFFD00
RR[0:F]
QSPI receive data (16 words)
$YFFD20
TR[0:F]
QSPI transmit data (16 words)
$YFFD40
CR[0:F]
QSPI command control (8 words)
F
re
e
sc
a
le
S
e
m
ic
o
n
d
u
c
to
r,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
c
..
.
相關PDF資料
PDF描述
MC68EN360CRC25 32-BIT, 25 MHz, RISC MICROCONTROLLER, CPGA241
MC68F333FE 32-BIT, FLASH, 16.78 MHz, MICROCONTROLLER, CQFP160
MC68F333FC 32-BIT, FLASH, 16.78 MHz, MICROCONTROLLER, PQFP160
MC68HC000L12F 16-BIT, 16.67 MHz, MICROPROCESSOR, CDIP64
MC68HC000L16 16-BIT, 16.67 MHz, MICROPROCESSOR, CDIP64
相關代理商/技術參數(shù)
參數(shù)描述
MC68CK338CPV14B1 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:32-Bit Modular Microcontroller
MC68CM16Z1 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:M68HC16Z Series
MC68CM16Z1CFC16 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:M68HC16Z Series
MC68CM16Z1CPV16 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:M68HC16Z Series
MC68E360VR25VLR2 功能描述:微處理器 - MPU QUICC ETHRN RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-324
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*