參數(shù)資料
型號(hào)： MC68711E20VFNE2
廠商： Freescale Semiconductor
文件頁數(shù)： 58/138頁
文件大小： 0K
描述： IC MCU 8BIT 52-PLCC
標(biāo)準(zhǔn)包裝： 23
系列： HC11
核心處理器： HC11
芯體尺寸： 8-位
速度： 4MHz
連通性： SCI，SPI
外圍設(shè)備： POR，WDT
輸入/輸出數(shù)： 38
程序存儲(chǔ)器容量： 20KB（20K x 8）
程序存儲(chǔ)器類型： OTP
EEPROM 大?。?/td> 512 x 8
RAM 容量： 768 x 8
電壓 - 電源 (Vcc/Vdd)： 4.5 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 8x8b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 105°C
封裝/外殼： 52-LCC（J 形引線）
包裝： 管件
Operating Modes and Memory
MC68HC711D3 Data Sheet, Rev. 2.1
26
Freescale Semiconductor
$000E
Timer Counter Register High
(TCNT)
Read:
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Write:
Reset:
00
000
$000F
Timer Counter Register Low
(TCNT)
Read:
Bit 7Bit 6
Bit 5Bit 4Bit 3
Bit 2Bit 1Bit 0
Write:
Reset:
00
000
$0010
Timer Input Capture Register 1
High (TIC1)
Read:
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Write:
Reset:
Unaffected by reset
$0011
Timer Input Capture Register 1
Low (TIC1)
Read:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Write:
Reset:
Unaffected by reset
$0012
Timer Input Capture Register 2
High (TIC2)
Read:
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Write:
Reset:
Unaffected by reset
$0013
Timer Input Capture Register 2
Low (TIC2)
Read:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Write:
Reset:
Unaffected by reset
$0014
Timer Input Capture Register 3
High (TIC3)
Read:
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Write:
Reset:
Unaffected by reset
$0015
Timer Input Capture Register 3
Low (TIC3)
Read:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Write:
Reset:
Unaffected by reset
$0016
Timer Output Compare Register 1
High (TOC1)
Read:
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 15
Write:
Reset:
11
111
$0017
Timer Output Compare Register 1
Low (TOC1)
Read:
Bit 7Bit 6
Bit 5Bit 4Bit 3
Bit 2Bit 1Bit 0
Write:
Reset:
11
111
$0018
Timer Output Compare Register 2
High (TOC2)
Read:
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Write:
Reset:
11
111
$0019
Timer Output Compare Register 2
Low (TOC2)
Read:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Write:
Reset:
11
111
Addr.
Register Name
Bit 7
6
543
21
Bit 0
= Unimplemented
R
= Reserved
U = Unaffected
Figure 2-2. Register and Control Bit Assignments (Sheet 2 of 5)
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