參數(shù)資料
型號(hào)： M5M4V16169DRT-10
廠商： Mitsubishi Electric Corporation
英文描述： 16MCDRAM:16M(1M-WORD BY 16-BIT) CACHED DRAM WITH 16K (1024-WORD BY 16-BIT) SRAM
中文描述： 16MCDRAM：16米（100萬(wàn)字由16位）與16K的緩存內(nèi)存（1024字由16位）的SRAM
文件頁(yè)數(shù)： 9/64頁(yè)
文件大?。?/td> 737K
代理商： M5M4V16169DRT-10
M5M4V16169DTP/RT-7,-8,-10,-15
16MCDRAM:16M(1M-WORD BY 16-BIT) CACHED DRAM WITH 16K (1024-WORD BY 16-BIT) SRAM
MODE DESCRIPTIONS (2)
MITSUBISHI LSIs
(REV 1.0) Jul. 1998
MITSUBISHI ELECTRIC
Buffer Read
Transfer
Buffer Write
Transfer
Data is transferred from the Read Buffer (RB2) to the SRAM. Addresses As3-9 select the
SRAM row to which the 8X16 bit block is to be written. Addresses As0-As2 must be set low.
Data is transferred from the SRAM to the Write-Buffer1 (WB1). Addresses As3-As9 decode
the SRAM Row (=8X16 bit block) to be transferred. Addresses As0-As2 must be set low.
The Buffer Write Transfer cycle "clears" all transfer mask bits in the WB1 Mask (allowing all
data to be transferred in a successive DRAM Write Transfer cycle).
9
X
DQs
SRAM
1KX16
8X16
8X16
8X16
8X16
8X16
16bits
16bits
16bits
As3-9
1of128Decode
SRAM RowDecoder
DRAM
1M X 16
Ad0-11
1of4096Decode
Ad3-7
1of32
Decode
As0-2
1of8
Decode
As0-2
1of8Decode
8X16Block
8X16Block
WB1
Upper Byte
Lower Byte
Upper Byte
Lower Byte
DRAM RowDecoder
16bits
As0-2
1of8Decode
Upper Byte
Lower Byte
RB2
Upper Byte
Lower Byte
RB1
DQs
SRAM
1KX16
8X16
8X16
8X16
8X16
8X16
16bits
16bits
16bits
As3-9
1of128Decode
SRAM RowDecoder
DRAM
1M X 16
1of4096Decode
Ad3-7
1of32
Decode
As0-2
1of8
Decode
As0-2
1of8Decode
8X16Block
8X16Block
WB1
Upper Byte
Lower Byte
DRAM RowDecoder
16bits
As0-2
1of8Decode
Upper Byte
Lower Byte
RB2
Lower Byte
Upper Byte
Lower Byte
RB1
Ad0-11
X
DQ8-15
DQ0-7
DQ8-15
DQ0-7
相關(guān)PDF資料
PDF描述
M5M4V16169DRT-15 16MCDRAM:16M(1M-WORD BY 16-BIT) CACHED DRAM WITH 16K (1024-WORD BY 16-BIT) SRAM
M5M4V16169DRT-7 16MCDRAM:16M(1M-WORD BY 16-BIT) CACHED DRAM WITH 16K (1024-WORD BY 16-BIT) SRAM
M5M4V16169DRT-8 22182053
M5M4V16G50DFP-10 16M (2-BANK x 262144-WORD x 32-BIT) Synchronous Graphics RAM
M5M4V16G50DFP-12 16M (2-BANK x 262144-WORD x 32-BIT) Synchronous Graphics RAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M5M4V16169DRT-15 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:16MCDRAM:16M(1M-WORD BY 16-BIT) CACHED DRAM WITH 16K (1024-WORD BY 16-BIT) SRAM
M5M4V16169DRT-7 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:16MCDRAM:16M(1M-WORD BY 16-BIT) CACHED DRAM WITH 16K (1024-WORD BY 16-BIT) SRAM
M5M4V16169DRT-8 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:16MCDRAM:16M(1M-WORD BY 16-BIT) CACHED DRAM WITH 16K (1024-WORD BY 16-BIT) SRAM
M5M4V16169DTP 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:16MCDRAM:16M(1M-WORD BY 16-BIT) CACHED DRAM WITH 16K (1024-WORD BY 16-BIT) SRAM
M5M4V16169DTP-10 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:16MCDRAM:16M(1M-WORD BY 16-BIT) CACHED DRAM WITH 16K (1024-WORD BY 16-BIT) SRAM
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