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參數(shù)資料
| 型號： | M5M4V16169DRT-10 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | 16MCDRAM:16M(1M-WORD BY 16-BIT) CACHED DRAM WITH 16K (1024-WORD BY 16-BIT) SRAM |
| 中文描述： | 16MCDRAM：16米（100萬字由16位）與16K的緩存內(nèi)存（1024字由16位）的SRAM |
| 文件頁數(shù)： | 54/64頁 |
| 文件大?。?/td> | 737K |
| 代理商： | M5M4V16169DRT-10 |
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M5M4V16169DTP/RT-7,-8,-10,-15
16MCDRAM:16M(1M-WORD BY 16-BIT) CACHED DRAM WITH 16K (1024-WORD BY 16-BIT) SRAM
MITSUBISHI LSIs
(REV 1.0) Jul. 1998
MITSUBISHI ELECTRIC
K
CMd#
CS#
DRAM Write Transfer 1 (WB1->WB2->DRAM)
Buffer Write Transfer (SRAM->WB1)
2
3
4
5
6
7
8
9
10
11
12
13
14
1
RAS#
CAS#
DTD#
Ad0-2
Ad3-11
WB2 [0-7]
WB1[0]
New Data[from WB1(0-7)]
Old Data
**Col
Ad0-Ad2=Low
PCG
SW
DPD DPD
SW
D1
DPD DPD
SW
D4
ACT
SW
DWT1
BWT BWT SW
PCG
DPD
SW
DNOP
SW
DNOP
DPD DPD DPD
SW
SW
D2
DQ0-15
tRC
tRP
tRCD
Row
Row
tRAS
tRWL
DRAM
SRAM
0
0
WB1 mask[0]
WB1[1]
1
WB1 mask[1]
WB1[2]
WB1 mask[2]
WB1[3]
WB1 masl[3]
WB1[4]
WB1 mask[4]
WB1[5]
WB1 mask[5]
WB1[6]
WB1 mask[6]
WB1[7]
WB1 mask[7]
2
3
4
5
6
7
detail
SW
SW
SW
1
2
3
4
5
6
7
D2
D3
D5
D6
D7
D0
D1
D3
D0
54
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| M5M4V16169DRT-7 | 16MCDRAM:16M(1M-WORD BY 16-BIT) CACHED DRAM WITH 16K (1024-WORD BY 16-BIT) SRAM |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M5M4V16169DRT-15 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:16MCDRAM:16M(1M-WORD BY 16-BIT) CACHED DRAM WITH 16K (1024-WORD BY 16-BIT) SRAM |
| M5M4V16169DRT-7 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:16MCDRAM:16M(1M-WORD BY 16-BIT) CACHED DRAM WITH 16K (1024-WORD BY 16-BIT) SRAM |
| M5M4V16169DRT-8 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:16MCDRAM:16M(1M-WORD BY 16-BIT) CACHED DRAM WITH 16K (1024-WORD BY 16-BIT) SRAM |
| M5M4V16169DTP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:16MCDRAM:16M(1M-WORD BY 16-BIT) CACHED DRAM WITH 16K (1024-WORD BY 16-BIT) SRAM |
| M5M4V16169DTP-10 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:16MCDRAM:16M(1M-WORD BY 16-BIT) CACHED DRAM WITH 16K (1024-WORD BY 16-BIT) SRAM |
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