參數(shù)資料
型號(hào)： M38C59MF-XXXHP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 6.25 MHz, MICROCONTROLLER, PQFP80
封裝： 12 X 12 MM, 0.50 MM PITCH, PLASTIC, LQFP-80
文件頁(yè)數(shù)： 75/75頁(yè)
文件大?。?/td> 995K
代理商： M38C59MF-XXXHP
Rev.2.00
Nov 23, 2005
page 9 of 73
REJ03B0028-0200
38C5 Group
FUNCTIONAL DESCRIPTION
Central Processing Unit (CPU)
The 38C5 group uses the standard 740 Family instruction set. Refer
to the table of 740 Family addressing modes and machine instruc-
tions or the 740 Family Software Manual for details on the instruction
set.
Machine-resident 740 Family instructions are as follows:
The FST and SLW instructions cannot be used.
The STP, WIT, MUL, and DIV instructions can be used.
The central processing unit (CPU) has six registers. Figure 6 shows
the 740 Family CPU register structure.
[Accumulator (A)]
The accumulator is an 8-bit register. Data operations such as arith-
metic data transfer, etc., are executed mainly through the accumula-
tor.
[Index Register X (X)]
The index register X is an 8-bit register. In the index addressing modes,
the value of the OPERAND is added to the contents of register X and
specifies the real address.
[Index Register Y (Y)]
The index register Y is an 8-bit register. In partial instruction, the
value of the OPERAND is added to the contents of register Y and
specifies the real address.
[Stack Pointer (S)]
The stack pointer is an 8-bit register used during subroutine calls
and interrupts. This register indicates start address of stored area
(stack) for storing registers during subroutine calls and interrupts.
The low-order 8 bits of the stack address are determined by the con-
tents of the stack pointer. The high-order 8 bits of the stack address
are determined by the stack page selection bit. If the stack page
selection bit is “0” , the high-order 8 bits becomes “0016”. If the stack
page selection bit is “1”, the high-order 8 bits becomes “0116”.
The operations of pushing register contents onto the stack and pop-
ping them from the stack are shown in Figure 7.
Table 4 shows the push and pop instructions of accumulator or pro-
cessor status register.
Store registers other than those described in Figure 7 with program
when the user needs them during interrupts or subroutine calls.
[Program Counter (PC)]
The program counter is a 16-bit counter consisting of two 8-bit regis-
ters PCH and PCL. It is used to indicate the address of the next in-
struction to be executed.
Fig. 6 740 Family CPU register structure
A
Accumulator
b7
b0
b7
b15
b0
b7
b0
X
Index register X
Y
Index register Y
S
Stack pointer
PCL
Program counter
PCH
N V T B D I Z C
Processor status register (PS)
Carry flag
Zero flag
Interrupt disable flag
Decimal mode flag
Break flag
Index X mode flag
Overflow flag
Negative flag
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