參數(shù)資料
型號(hào)： M38C59MF-XXXHP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 6.25 MHz, MICROCONTROLLER, PQFP80
封裝： 12 X 12 MM, 0.50 MM PITCH, PLASTIC, LQFP-80
文件頁(yè)數(shù)： 55/75頁(yè)
文件大小： 995K
代理商： M38C59MF-XXXHP
Rev.2.00
Nov 23, 2005
page 59 of 73
REJ03B0028-0200
38C5 Group
NOTES ON USE
VL3 pin
When LCD drive control circuit is not used, connect VL3 to VCC.
Countermeasures against noise
The following countermeasures are effective against noise in theory,
however, it is necessary not only to take masures as follows but to
evaluate before actual use.
(1) Shortest wiring length
Wiring for RESET pin
Make the length of wiring which is connected to the RESET pin as
short as possible. Especially, connect a capacitor across the
RESET pin and the VSS pin with the shortest possible wiring (within
20 mm).
q Reason
The width of a pulse input into the RESET pin is determined by
the timing necessary conditions. If noise having a shorter pulse
width than the standard is input to the RESET pin, the reset is
released before the internal state of the microcomputer is com-
pletely initialized. This may cause a program runaway.
Fig. 59 Wiring for clock I/O pins
(2) Connection of bypass capacitor across VSS line and VCC line
Connect an approximately 0.1
F bypass capacitor across the VSS
line and the VCC line as follows:
Connect a bypass capacitor across the VSS pin and the VCC pin at
equal length.
Connect a bypass capacitor across the VSS pin and the VCC pin
with the shortest possible wiring.
Use lines with a larger diameter than other signal lines for VSS line
and VCC line.
Connect the power source wiring via a bypass capacitor to the VSS
pin and the VCC pin.
Fig. 58 Wiring for the RESET pin
Wiring for clock input/output pins
Make the length of wiring which is connected to clock I/O pins as
short as possible.
Make the length of wiring (within 20 mm) across the grounding
lead of a capacitor which is connected to an oscillator and the
VSS pin of a microcomputer as short as possible.
Separate the VSS pattern only for oscillation from other VSS pat-
terns.
q Reason
If noise enters clock I/O pins, clock waveforms may be deformed.
This may cause a program failure or program runaway. Also, if a
potential difference is caused by the noise between the VSS level
of a microcomputer and the VSS level of an oscillator, the correct
clock will not be input in the microcomputer.
Fig. 60 Bypass capacitor across the VSS line and the VCC line
RESET
Reset
circuit
Noise
VSS
Reset
circuit
VSS
RESET
VSS
N.G.
O.K.
Noise
XIN
XOUT
VSS
XIN
XOUT
VSS
N.G.
O.K.
VSS
VCC
VSS
VCC
N.G.
O.K.
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