參數(shù)資料
型號: M38C24M4A-XXXFP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 5 MHz, MICROCONTROLLER, PQFP64
封裝: 14 X 14 MM, 0.80 MM PITCH, PLASTIC, LQFP-64
文件頁數(shù): 93/102頁
文件大小: 1369K
代理商: M38C24M4A-XXXFP
Rev.2.00
May 28, 2004
page 90 of 100
38C2 Group (A Version)
twH(SCLK)
twL(SCLK)
td(SCLK-TxD)
tV(SCLK-TxD)
tr(SCLK)
tf(SCLK)
tr(CMOS)
tf(CMOS)
twH(SCLK)
twL(SCLK)
td(SCLK-TxD)
tV(SCLK-TxD)
tr(SCLK)
tf(SCLK)
tr(CMOS)
tf(CMOS)
Limits
Parameter
Min.
tc(SCLK)/2–30
–30
Typ.
25
15
Max.
140
30
40
30
Symbol
Unit
ns
Notes 1: When the P-channel output disable bit (bit 4 of address 0FE116 or 0FE416) is “0.”
2: The XOUT, XCOUT pins are excluded.
Serial I/O1, 2 clock output “H” pulse width
Serial I/O1, 2 clock output “L” pulse width
Serial I/O1, 2 output delay time
(Note 1)
Serial I/O1, 2 output valid time
(Note 1)
Serial I/O1, 2 clock output rising time
Serial I/O1, 2 clock output falling time
CMOS output rising time
CMOS output falling time
Table 38 Switching characteristics 1 (Mask ROM version)
(Vcc = 4.0 to 5.5 V, Vss = 0 V, Ta = –20 to 85°C, unless otherwise noted)
Limits
ns
Parameter
Min.
tC(SCLK)/2–80
–30
Typ.
60
40
Max.
400
80
120
80
Symbol
Unit
Serial I/O1, 2 clock output “H” pulse width
Serial I/O1, 2 clock output “L” pulse width
Serial I/O1, 2 output delay time
(Note 1)
Serial I/O1, 2 output valid time
(Note 1)
Serial I/O1, 2 clock output rising time
Serial I/O1, 2 clock output falling time
CMOS output rising time
CMOS output falling time
Table 39 Switching characteristics 2 (Mask ROM version)
(Vcc = 1.8 to 4.0 V, Vss = 0 V, Ta = –20 to 85°C, unless otherwise noted)
Notes 1: When the P-channel output disable bit (bit 4 of address 0FE116 or 0FE416) is “0.”
2: The XOUT, XCOUT pins are excluded.
Fig. 73 Circuit for measuring output switching characteristics
P00–P07, P10–P17, P20–P27 (Note 2)
P30–P37, P40–P47, P50–P57, P60–P62
(Note 2)
P00–P07, P10–P17, P20–P27 (Note 2)
P30–P37, P40–P47, P50–P57, P60–P62
(Note 2)
P00–P07, P10–P17, P20–P27 (Note 2)
P30–P37, P40–P47, P50–P57, P60–P62
(Note 2)
P00–P07, P10–P17, P20–P27 (Note 2)
P30–P37, P40–P47, P50–P57, P60–P62
(Note 2)
Measurement output pin
100pF
CMOS output
Measurement output pin
100pF
N-channel open-drain output (Note)
1k
Note: When bit 4 of the UART control register
(address 0EF116 or 0FE416) is “ 1.”
(N-channel open-drain output mode)
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