參數(shù)資料
型號(hào): M30101F3FP
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PDSO42
封裝: PLASTIC, SSOP-42
文件頁(yè)數(shù): 85/125頁(yè)
文件大?。?/td> 1608K
代理商: M30101F3FP
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Under
development
Tentative Specifications REV.C1
Specifications in this manual are tentative and subject to change.
Mitsubishi microcomputers
M30100/M30101/M30102 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Timer
62
Bit name
Function
Bit symbol
Timer X count source
select bit
b1 b0
TXCK1
TXCK0
TYCK0
Timer Y count source
select bit
TZCK0
TYCK1
TZCK1
0 0 : f1
0 1 : f8
1 0 : f32
1 1 : fC32
b7 b6
T1CK1
T1CK0
Timer 1 count source
select bit
Timer Z count source
select bit
W
R
Note : When attempting to select ring oscillator output, set the ring oscillation enable bit (CM14) of the system
clock control register (address 000716) for oscillation enabled.
Timer count source setting register
Symbol
Address
When reset
TCSS
008E16
0016
b7 b6 b5 b4 b3 b2 b1 b0
0 0 : f1
0 1 : f8
1 0 : f32
1 1 : fC32
b3 b2
0 0 : f1
0 1 : f8
1 0 : Ring oscillator output
1 1 : fC32
b5 b4
0 0 : f1
0 1 : f8
1 0 : Timer Y underflow
1 1 : fC32
(Note)
(5) Pulse period measure mode
This mode is used to measure the pulse period of the signal fed to the P17/CNTR0 pin.
When the CNTR0 polarity select bit = 0, timer X counts the signal selected with the timer X count
source select bit for a period from one rising edge to the next rising edge of the CNTR0 pin input
signal. Upon occurrence of a rising edge, the value of timer X used for read purpose is retained and
timer X is reloaded with the value as it newly starts counting. The value of timer X used for read
purpose is no longer retained by reading timer X. When the CNTR0 polarity select bit = 1, timer X
counts the signal selected with the timer X count source select bit for a period from one falling edge to
the next falling edge of the CNTR0 pin input signal. Upon occurrence of a falling edge, the value of
timer X used for read purpose is retained and timer X is reloaded with the value as it newly starts
counting. The value of timer X used for read purpose is no longer retained by reading timer X.
The value of timer X must be read out before the pulse period measure mode is set. Furthermore, the
timer X must be read within the next period of CNTR0. If the value is read beyond the period, the value
of the next period of the period which was read last time is read out.
In any operation mode, timer X can be made to stop counting by setting the timer X count start flag to
0. When timer X underflows, the timer X interrupt request bit is set to 1.
Precaution
CNTR0 polarity selection
The set value of the CNTR0 polarity select bit also affects the interrupt polarity (active-high or low).
When the CNTR0 polarity select bit = 0, the CNTR0 interrupt request bit is set to 1 by the rising edge
of the CNTR0 pin input. When the CNTR0 polarity select bit = 1, the CNTR0 interrupt request bit is set
to 1 by the falling edge of the CNTR0 pin input.
Figure 1.14.4. Timer count source setting register
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