參數(shù)資料
型號(hào): M30101F3FP
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PDSO42
封裝: PLASTIC, SSOP-42
文件頁(yè)數(shù): 75/125頁(yè)
文件大?。?/td> 1608K
代理商: M30101F3FP
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Under
development
Tentative Specifications REV.C1
Specifications in this manual are tentative and subject to change.
Mitsubishi microcomputers
M30100/M30101/M30102 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Interrupts
53
Digital filter
(input level
matches 3x)
INT0 interrupt request
INT0
f1
f8
f32
INT0F1, INT0F0=0, 0
INT0F1, INT0F0
Port P45
direction
register
INT0 input enable bit
UART1
UART1 receive interrupt
control register
UART1 receive
hardware interrupt
enable bit
UART1 receive
interrupt request
UART1 receive
hardware interrupt
request
INT0 Input Filter
The INT0 input has a digital filter which can be sampled by one of three sampling clocks. You select the
sampling clock using the INT0 Input Filter Select bits, bits 1 and 0.
INT0 interrupt request occurs when the sampled input level matches three times.
Figure 1.12.11 shows the INT0 input filter.
Figure 1.12.11. INT0 input filter
Figure 1.12.12. UART1 receive hardware interrupt
UART1 Receive Hardware Input
A hardware interrupt can be generated during UART1 receive by enabling the UART1 Receive Interrupt
Enable bit. The interrupt vector is stored in addresses FFFF816 to FFFFB16.
Note: The UART1 Receive Hardware Interrupt is a debugger exclusive interrupt.
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