參數(shù)資料
型號(hào)： M30101F3FP
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PDSO42
封裝： PLASTIC, SSOP-42
文件頁數(shù)： 83/125頁
文件大?。?/td> 1608K
代理商： M30101F3FP
Under
development
Tentative Specifications REV.C1
Specifications in this manual are tentative and subject to change.
Mitsubishi microcomputers
M30100/M30101/M30102 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Timer
60
Clock source
selection
Timer
Pulse period
measurement
Pulse output
f1
f8
f32
Event counter
fC32
Toggle flip-flop
Polarity
switching
CNTR0
Q
T
CNTR0
interrupt
request bit
P30/TXOUT select bit
TXOUT
CNTR0 polarity
switching bit
"1"
"0"
R
Pulse width
measurement
Pulse output
Counter (8)
Reload register (8)
Counter (8)
Reload register (8)
Timer X count
start flag
Prescaler X (address 008C16)
Timer X (address 008D16)
Pulse output mode
Timer X latch write
Timer X interrupt
request bit
Peripheral data bus
Timer X mode register
Symbol
Address
When reset
TXMR
008B16
XX0000002
Bit name
Function
Bit symbol
W
R
b7
b6 b5
b4
b3
b2
b1 b0
0 0 : Timer mode or
pulse period measurement mode
0 1 : Pulse output mode
1 0 : Event counter mode
1 1 : Pulse width measurement mode
b1 b0
TXMOD2
TXS
TXMOD1
R0EDG
TXMOD0
TXOCNT
CNTR0 polarity
switching bit
Nothing is assigned.
When write, set "0". When read, their contents are "0".
Operation mode
select bit 0, 1
Note 1: Output is set regardless of the setting of the direction register of port P17.
Note 2: Output is set regardless of the setting of the direction register of port P30.
Note 3: Except in pulse period measurement mode, the operation mode select bit 2 must be
set to “0”.
0 : Interrupt at rising edge
Count on rising edge (when event counter mode)
“H” width measurement (when pulse width
measurement mode)
1: Interrupt at falling edge
Count on falling edge (When event counter mode)
“L” width measurement (When pulse width
measurement mode)
Timer X count
start flag
0 : Stops counting
1 : Starts counting
P30/TXOUT
select bit
0 : Port P30
1 : TXOUT output
Operation mode
select bit 2
0 : Timer mode
1 : Pulse period measurement mode
(Note 1)
(Note 2)
(Note 3)
Figure 1.14.2. Block diagram of timer X
Figure 1.14.3. Timer X mode register
Timer X
Timer X is an 8-bit timer, which always counts prescaler-X output. When timer X underflows after reach-
ing the minimum count, the timer X interrupt request bit is set.
Prescaler X is an 8-bit prescaler, which counts the signal selected with the timer X count source select bit.
Prescaler X and timer X respectively have a prescaler-X reload register and a timer-X reload register to
hold their reload values. The value of the prescaler-X reload register is transferred to prescaler X when it
underflows. Similarly, the value of the timer-X reload register is transferred to timer X when it underflows.
Any value written to prescaler X (PREX) is also written to the prescaler-X reload register at the same time.
Any value written to timer X (TX) is also written to the timer-X reload register at the same time.
When prescaler X (PREX) or timer X (TX) is accessed for read, their count value is read out.
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