參數(shù)資料
型號(hào)： M29DW640F70N6F
廠商： STMICROELECTRONICS
元件分類： PROM
英文描述： 4M X 16 FLASH 3V PROM, 70 ns, PDSO48
封裝： 12 X 20 MM, LEAD FREE, PLASTIC, TSOP-48
文件頁(yè)數(shù)： 26/74頁(yè)
文件大?。?/td> 556K
代理商： M29DW640F70N6F
Status register
M29DW640F
5
Status register
The M29DW640F has one Status Register. The Status Register provides information on the
current or previous Program or Erase operations executed in each bank. The various bits
convey information and errors on the operation. Bus Read operations from any address
within the Bank, always read the Status Register during Program and Erase operations. It is
also read during Erase Suspend when an address within a block being erased is accessed.
The bits in the Status Register are summarized in Table 9: Status Register Bits.
5.1
Data Polling Bit (DQ7)
The Data Polling Bit can be used to identify whether the Program/Erase Controller has
successfully completed its operation or if it has responded to an Erase Suspend. The Data
Polling Bit is output on DQ7 when the Status Register is read.
During Program operations the Data Polling Bit outputs the complement of the bit being
programmed to DQ7. After successful completion of the Program operation the memory
returns to Read mode and Bus Read operations from the address just programmed output
DQ7, not its complement.
During Erase operations the Data Polling Bit outputs ’0’, the complement of the erased state
of DQ7. After successful completion of the Erase operation the memory returns to Read
Mode.
In Erase Suspend mode the Data Polling Bit will output a ’1’ during a Bus Read operation
within a block being erased. The Data Polling Bit will change from a ’0’ to a ’1’ when the
Program/Erase Controller has suspended the Erase operation.
Figure 6: Data Polling flowchart, gives an example of how to use the Data Polling Bit. A Valid
Address is the address being programmed or an address within the block being erased.
5.1.1
Toggle Bit (DQ6)
The Toggle Bit can be used to identify whether the Program/Erase Controller has
successfully completed its operation or if it has responded to an Erase Suspend. The Toggle
Bit is output on DQ6 when the Status Register is read.
During Program and Erase operations the Toggle Bit changes from ’0’ to ’1’ to ’0’, etc., with
successive Bus Read operations at any address. After successful completion of the
operation the memory returns to Read mode.
During Erase Suspend mode the Toggle Bit will output when addressing a cell within a block
being erased. The Toggle Bit will stop toggling when the Program/Erase Controller has
suspended the Erase operation.
Figure 7: Toggle flowchart, gives an example of how to use the Data Toggle Bit. Figure 14
and Figure 15 describe Toggle Bit timing waveform.
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M29DW640F70ZE1E 制造商:NUMONYX 制造商全稱:Numonyx B.V 功能描述:64 Mbit (8Mb x8 or 4Mb x16, Multiple Bank, Page, Boot Block) 3V Supply Flash Memory
M29DW640F70ZE1F 制造商:NUMONYX 制造商全稱:Numonyx B.V 功能描述:64 Mbit (8Mb x8 or 4Mb x16, Multiple Bank, Page, Boot Block) 3V Supply Flash Memory
M29DW640F70ZE1T 制造商:NUMONYX 制造商全稱:Numonyx B.V 功能描述:64 Mbit (8Mb x8 or 4Mb x16, Multiple Bank, Page, Boot Block) 3V Supply Flash Memory
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