參數(shù)資料
型號(hào): LXT386BE
英文描述: PCM TRANSCEIVER|QUAD|CEPT PCM-30/E-1|CMOS|BGA|160PIN|PLASTIC
中文描述: 的PCM收發(fā)器|四|優(yōu)稅PCM-30/E-1 |的CMOS | BGA封裝| 160PIN |塑料
文件頁數(shù): 8/80頁
文件大小: 1112K
代理商: LXT386BE
LXT384
Octal T1/E1/J1 Transceiver
8
Datasheet
Figure 2. LXT384 Detailed Block Diagram
LOS1
RPOS1/RNEG1/RCLK1
TPOS1/TNEG1/TCLK1
RTIP3/RRING3
LOS2
RPOS2/RNEG2/RCLK2
TPOS2/TNEG2/TCLK2
LOS3
RPOS3/RNEG3/RCLK3
TPOS3/TNEG3/TCLK3
LOS4
RPOS4/RNEG4/RCLK4
TPOS4/TNEG4/TCLK4
LOS5
RPOS5/RNEG5/RCLK5
TPOS5/TNEG5/TCLK5
LOS6
RPOS6/RNEG6/RCLK6
TPOS6/TNEG6/TCLK6
TTIP3/TRING3
RTIP4/RRING4
TTIP4/TRING4
RTIP5/RRING5
TTIP5/TRING5
RTIP2/RRING2
TTIP2/TRING2
RTIP1/RRING1
TTIP1/TRING1
RTIP6/RRING6
TTIP6/TRING6
Transceiver 5
Transceiver 4
Transceiver 3
Transceiver 2
Transceiver 1
Transceiver 0
G
LOS0
RPOS0
RCLK0
RNEG0
TRING0
TTIP0
A3 - A0
MUX
Transceiver 6
HARDWARE / SOFTWARE CONTROL
(JTAG INTERFACE)
A
DATA SLICER
LINE DRIVER
PULSE
LOS
CLCLOCK
RECOVERY
PULSE
SHAPER
D
R
B8ZS / HDB3
DECODER
B8ZS / HDB3
ENCODER
JITTER
ATTENUATOR
RX OR TX
PATH
JITTER
ATTENUATOR
RX OR TX
PATH
JTAG
SERIAL/
PARALLEL
PORT
RTIP7
RRING7
TTIP7
TRING7
MCLK
LOS7
TPOS7
TCLK7
TNEG7
RPOS7
RCLK7
RNEG7
Transceiver 7
MODE
LOOP 0..7
CLKE
JASEL
A
DATA SLICER
LINE DRIVER
PPULSE
SHAPER
D
R
B8ZS / HDB3
DECODER
B8ZS / HDB3
ENCODER
JITTER
ATTENUATOR
RX OR TX
PATH
JITTER
ATTENUATOR
RX OR TX
PATH
LOS
CCLOCK
RECOVERY
TPOS0
TCLK0
TNEG0
RRING0
RTIP0
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