參數(shù)資料
型號: LXT386BE
英文描述: PCM TRANSCEIVER|QUAD|CEPT PCM-30/E-1|CMOS|BGA|160PIN|PLASTIC
中文描述: 的PCM收發(fā)器|四|優(yōu)稅PCM-30/E-1 |的CMOS | BGA封裝| 160PIN |塑料
文件頁數(shù): 53/80頁
文件大?。?/td> 1112K
代理商: LXT386BE
Octal T1/E1/J1 Transceiver
LXT384
Datasheet
53
4.4.3
Device Identification Register (IDR)
The IDR register provides access to the manufacturer number, part number and the LXT384
revision. The register is arranged per IEEE 1149.1 and is represented in
Table 33
. Data into the IDR
is shifted in LSB first.
4.4.4
Bypass Register (BYR)
The Bypass Register is a 1 bit register that allows direct connection between the TDI input and the
TDO output.
4.4.5
Instruction Register (IR)
The IR is a 3 bit shift register that loads the instruction to be performed. The instructions are shifted
LSB first.
Table 34
shows the valid instruction codes and the corresponding instruction description.
Figure 17. Analog Test Port Application
Transceiver 6
Transceiver 7
RRING7
TTIP7
TRING7
RTIP7
RRING6
TTIP6
TRING6
RTIP6
Transceiver 0
A
RRING0
RTIP0
JTAG Port
ASR Register
AT2
AT1
1K
1K
Table 33. Device Identification Register (IDR)
Bit #
Comments
31 - 28
Revision number
27 - 12
Part number
11 - 1
Manufacturer number
0
Set to
1
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