- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄369872 > LU3X34FTR (Lineage Power) Quad 3 V 10/100 Ethernet Transceiver(四通道10M位/秒和100 M位/秒以太網(wǎng)收發(fā)器) PDF資料下載
參數(shù)資料
| 型號： | LU3X34FTR |
| 廠商： | Lineage Power |
| 英文描述： | Quad 3 V 10/100 Ethernet Transceiver(四通道10M位/秒和100 M位/秒以太網(wǎng)收發(fā)器) |
| 中文描述： | 四3伏10/100以太網(wǎng)收發(fā)器（四通道1000萬位/秒和100海里位/秒以太網(wǎng)收發(fā)器） |
| 文件頁數(shù)： | 1/52頁 |
| 文件大?。?/td> | 678K |
| 代理商： | LU3X34FTR |
當(dāng)前第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁
Preliminary Data Sheet
July 2000
LU3X34FTR
Quad 3 V 10/100 Ethernet Transceiver TX/FX
Overview
The LU3X34FTR is a fully integrated, 4-port
10/100 Mbits/s physical layer device with an inte-
grated transceiver. This part was designed specifi-
cally for 10/100 Mbits/s switches. These applications
typically require stringent functionality in addition to
very tight board space, power, and cost require-
ments. The LU3X34FTR supports RMII and SMII
interfaces, offering the designer multiple reduced pin
count interfaces to save both real estate and cost in
system design. The LU3X34FTR was designed from
the beginning to conform fully with all pertinent spec-
ifications, from the ISO
1
/IEC
2
11801 and EIA
3
/TIA
568 cabling guidelines to ANSI
4
X3.263TP-PMD to
IEEE
5
802.3 Ethernet specifications.
Features
I
4-port, single-chip, integrated physical layer and
transceivers for 10Base-T, 100Base-TX, or
100Base-FX functions.
I
IEEE 802.3 compatible 10Base-T and 100Base-T
physical layer interface and ANSI X3.263 TP-PMD
compatible transceiver.
I
Interface support for RMII and SMII switch
applications.
I
Autonegotiation pin configurability on a per-port
basis.
I
FX mode configurable on a per-port basis.
I
Built-in analog 10 Mbit receive filter, removing the
need for external filters.
I
Built-in 10 bit transmit filter.
I
10 Mbit PLL, exceeding tolerances for both
preamble and data jitter.
I
100 Mbit PLL, combined with the digital adaptive
equalizer, robustly handles variations in rise-fall
time, excessive attenuation due to channel loss,
duty-cycle distortion, crosstalk, and baseline
wander.
I
Transmit rise-fall time manipulated to provide lower
emissions, amplitude fully compatible for proper
interoperability.
I
Programmable scrambler seed for better FCC
compliancy.
I
IEEE 802.3u Clause 28 compliant autonegotiation
for full 10 Mbits/s and 100 Mbits/s control.
I
Extended management support with interrupt
capabilities.
I
PHY MIB support.
I
Low-power 500 mA max.
— Low-cost 128-pin SQFP packaging with heat
spreader.
1.ISO is a registered trademark of The International Organization
of Standardization.
2.IECis a registered trademark of The International Electrotechni-
cal Commission.
3.EIAis a registered trademark of Electronic Industries Associa-
tion.
4.ANSI is a registered trademark of American National Standards
Institute, Inc.
5.IEEE s a registered trademark of The Institute of Electrical and
Electronics Engineers, Inc.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LU3X54FT | QUAD-FET (Fast Ethernet Transceiver) for 10Base-T/100Base-TX/FX |
| LU3X54FTL | QUAD-FET for 10Base-T/100Base-TX/FX |
| LU3X54FTL-HS208-DB | QUAD-FET for 10Base-T/100Base-TX/FX |
| LU3X54FT | Quad-FET (Fast Ethernet Transceiver) for 10Base-T/100Base-TX/FX(應(yīng)用于10基數(shù)-T和100基數(shù)-TX/FX的四快速以太網(wǎng)收發(fā)器) |
| LU5X34F | Quad Gigabit Ethernet Transceiver |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LU3X34FTR-HS128-DB | 制造商:AGERE 制造商全稱:AGERE 功能描述:Quad 3 V 10/100 Ethernet Transceiver TX/FX |
| LU3X54FT | 制造商:AGERE 制造商全稱:AGERE 功能描述:QUAD-FET (Fast Ethernet Transceiver) for 10Base-T/100Base-TX/FX |
| LU3X54FTL | 制造商:AGERE 制造商全稱:AGERE 功能描述:QUAD-FET for 10Base-T/100Base-TX/FX |
| LU3X54FTLHS208 | 制造商:Alcatel-Lucent 功能描述:3X54FTLHS208 |
| LU3X54FTL-HS208-DB | 制造商:AGERE 制造商全稱:AGERE 功能描述:QUAD-FET for 10Base-T/100Base-TX/FX |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。