參數(shù)資料
型號(hào): LU3X34FTR-HS128-DB
英文描述: Quad 3 V 10/100 Ethernet Transceiver TX/FX
中文描述: 四3伏10/100以太網(wǎng)收發(fā)器德克薩斯州/外匯
文件頁(yè)數(shù): 15/52頁(yè)
文件大小: 678K
代理商: LU3X34FTR-HS128-DB
Lucent Technologies Inc.
15
Preliminary Data Sheet
July 2000
LU3X34FTR
Quad 3 V 10/100 Ethernet Transceiver TX/FX
Functional Description
(continued)
Loopback
During normal operation, TXD[1:0] and TX_EN will not be looped back to CRS_DV and RXD[1:0].
Serial Media Independent Interface (SMII)
The SMII allows a further reduction in the number of signals that are required to interface a PHY to a MAC. There
are two global signals, CLK125 and SYNC, and two per-port signals, RXD, TXD. All signals are synchronous to the
125 MHz clock.
5-7507(F).r4
Figure 6. SMII Connection Diagram
5-7507(F).r4
Figure 7. Receive Sequence Diagram
SMII_TXD0
SMII_RXD0
SMII_TXD1
SMII_RXD1
SMII_TXD2
SMII_RXD2
SMII_TXD3
SMII_RXD3
SMII_SYNC
REF_CLK
125 MHz
REFERENCE CLOCK
MULTI-MAC
PORT 0
PORT 1
PORT 2
PORT 3
LU3X34FTR
CRS
RXDV
RXD0
RXD1
RXD2
RXD3
RXD4
RXD5
RXD6
RXD7
1
2
3
4
5
6
7
8
9
10
11
REF_CLK
SMII_SYNC
SMII_RXD
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