- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄377624 > LF3370 (Logic Devices Incorporated) High-Definition Video Format Converter(高清晰度視頻格式轉(zhuǎn)換器) PDF資料下載
參數(shù)資料
| 型號(hào)： | LF3370 |
| 廠商： | Logic Devices Incorporated |
| 英文描述： | High-Definition Video Format Converter(高清晰度視頻格式轉(zhuǎn)換器) |
| 中文描述： | 高清晰度視頻格式轉(zhuǎn)換器（高清晰度視頻格式轉(zhuǎn)換器） |
| 文件頁數(shù)： | 9/22頁 |
| 文件大?。?/td> | 256K |
| 代理商： | LF3370 |
DEVICES INCORPORATED
Video Imaging Products
9
LF3370
High-Definition Video Format Converter
08/21/2000–LDS.3370-E
LOW, blanking level words are continu-
ally injected with user-defined blanking
words. Blanking words are injected on
the next rising clock edge when HBLANK
is LOW. In addition, HBLANK clears
flags HF
0
and HF
1
and resets a 20-bit
incrementing counter (0 - 1,048,575). If a
HIGH to LOW transition on HBLANK is
detected on a rising edge of clock, HF
0
and HF
1
are cleared and the counter is
reset on the following rising edge of clock
(see Figure 10). Key Channel blanking
may be independently enabled or
disabled using Congifuration Register 1
(see Table 6).
HF
0
/HF
1
and Counter
HF
0
and HF
1
are two independent flags
that are set when the pre-programmed
HF
0
or HF
1
count value is equal to the 20-
bit incrementing counter value. For each
flag, one user-defined 20-bit count value
can be programmed. When HF
0
or HF
1
count value is equal to the counter value,
HF
0
or HF
1
is set on the next rising edge
of clock. Once the flags are set, they must
be reset if they are needed again. The
counter will increment by one at the rate
of CLK and can be reset by HBLANK.
The counter will continue to loop if not
reset. HF
0
and HF
1
count value register
loading is discussed in the LF Interface.
Please note, using HBLANK is the
recommended way of clearing HF
0
and
HF
1
flags but they can be cleared by
RESET, normally performed during
device initialization. RESET will not reset
the counter.
Input/Output Bias Adder
The programmable Input/Output Bias
Adders can be used to subtract or add a
13-bit offset to the data. Input and output
data formats for the two sections are
F
IGURE
11.
M
ATRIX
M
ULTIPLIER
AND
K
EY
S
CALER
A
’
D
13
13
26
26
28
26
20(MSB)
L
R S
13
B
’
20(MSB)
L
R S
13
C
’
20(MSB)
L
R S
13
D
’
20(MSB)
L
R S
13
13
26
13
26
13
26
13
26
13
26
13
26
13
26
13
26
Coef Bank 4
Coef Bank 0
13
Coef Bank 1
Coef Bank 2
Coef Bank 5
Coef Bank 6
Coef Bank 7
Coef Bank 8
26
28
26
28
13
26
13
13
13
13
13
13
13
A
13
13
13
13
13
Coef Bank 3
13
13
13
13
13
13
Coef Bank 9
26
26
26
26
26
26
B
C
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LF39J8 | DIODE ZENER TRIPLE ISOLATED 200mW 8.2Vz 20mA-Izt 0.05 3uA-Ir 6.5 SOT-363 3K/REEL |
| LF43881JC40 | 8 x 8-bit Digital Filter |
| LF43881 | 8 x 8-bit Digital Filter |
| LF48212QC20 | 12 x 12-bit Alpha Mixer |
| LF48212QC25 | 12 x 12-bit Alpha Mixer |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LF3370QC12 | 制造商:LOGIC 制造商全稱:LOGIC 功能描述:High-Definition Video Format Converter |
| LF33AB | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Very low drop voltage regulators with inhibit |
| LF33ABDT | 功能描述:低壓差穩(wěn)壓器 - LDO 3.3V 0.5A Positive RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動(dòng)電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20 |
| LF33ABDT-TR | 功能描述:低壓差穩(wěn)壓器 - LDO 3.3V 0.5A Positive RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動(dòng)電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20 |
| LF33ABP | 功能描述:低壓差穩(wěn)壓器 - LDO 3.3V 0.5A Positive RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動(dòng)電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。