參數(shù)資料
型號： LF3370
廠商： Logic Devices Incorporated
英文描述： High-Definition Video Format Converter(高清晰度視頻格式轉(zhuǎn)換器)
中文描述： 高清晰度視頻格式轉(zhuǎn)換器（高清晰度視頻格式轉(zhuǎn)換器）
文件頁數(shù)： 5/22頁
文件大?。?/td> 256K
代理商： LF3370
DEVICES INCORPORATED
Video Imaging Products
5
LF3370
High-Definition Video Format Converter
08/21/2000–LDS.3370-E
LF3370 Device Initialization
This section explains how to initialize the
device for proper operation. It also serves
as a summary of all conditions that should
be considered before using the device or
for troubleshooting.
Configuration Register 0 and Configura-
tion Register 1 must be loaded before
operation of the device. If Core Bypassing
is desired, Configuration Register 2 must
be loaded before use. If use of the Half-
Band Filters is desired, at least one Half-
Band Filter RSL Register Set must be
loaded and selected for each Half-Band
Filter.
If use of the Matrix Multiplier/Key Scaler
is desired, at least one Matrix Multiplier/
Key Scaler RSL Register Set and coefficient
must be loaded and selected for each
channel. If use of the Input Bias Adder is
desired, at least one Input Bias Adder
Register must be loaded and selected
before use. If use of the Output Bias Adder
is desired, at least one Output Bias Adder
Register must be loaded and selected
before use. If use of the Look-Up Table is
desired, the Look-Up Table must be loaded
before use.
When using a single channel input or
output with interleaved video, SYNC and
RESET should be used for proper initializa-
tion as shown in Figure 4. If 12 bits or less
input data is desired, the input data should
be shifted so the MSBs are aligned.
Input Demultiplexer
The input demultiplexer section acts as a
buffer between the user’s datapath and the
LF3370’s core. Data may be presented on
input ports A
12-0
, B
12-0
, and C
12-0
as three
channels of non-interleaved input data, one
channel non-interleaved and one channel
interleaved input data, or one channel of
interleaved data (see Table 1 for various
video input schemes). D
12-0
is the Key
channel input port; the Key channel simply
gets passed through the input
demultiplexer with a latency that matches
the other three channels.
* Not all input/output combinations are valid. If single channel interleaved video
is used on either the input or output, the core clock will be running at CLK/2.
Thus the maximum input, output, and core data rate must be considered.
Input
Channel
A
12-0
B
12-0
C
12-0
D
12-0
Output
Channel
W
12-0
X
12-0
Y
12-0
Z
12-0
Input Format
4:2:2:4*
Y
Cr
Cb
Key
Output Format
4:2:2:4*
Y
Cr
Cb
Key
4:4:4:4*
R
G
B
Key
4:2:2:4
Y
Cr/Cb
N/A
Key
4:2:2:4
Y/Cr/Cb
N/A
N/A
Key
T
ABLE
1.
I
NPUT
/O
UTPUT
F
ORMATS
4:4:4:4*
R
G
B
Key
4:2:2:4
Y
Cr/Cb
N/A
Key
4:2:2:4
Y/Cr/Cb
N/A
N/A
Key
F
IGURE
3. I
NPUT
AND
O
UTPUT
F
ORMATS
12 11 10
–2
0
(Sign)
2
1
0
2
–1
2
–2
2
–10
2
–11
2
–12
Coefficient Data
12 11 10
–2
12
(Sign)
2
2
2
1
2
1
0
2
0
2
11
2
10
12 11 10
–2
12
(Sign)
2
2
2
1
2
1
0
2
0
2
11
2
10
Input Data
Output Data
INPUT BIAS ADDER/OUTPUT BIAS ADDER
MATRIX MULTIPLIER/KEY SCALER
Input Data
F
19
F
18
F
17
–2
15
(Sign)
F
2
F
1
F
0
2
–2
2
–3
2
–4
2
14
2
13
F
19
F
18
F
17
–2
13
(Sign)
F
2
F
1
F
0
2
–4
2
–5
2
–6
2
12
2
11
*Matrix Multiplier Output
*Key Scaler Output
12 11 10
–2
12
(Sign)
2
2
2
1
2
1
0
2
0
2
11
2
10
*Format of Matrix Multiplier/Key Scaler ouput feeding the RSL Circuitry. F
19
-F
0
corresponds to 20 MSBs of which a
13-bit window can be selected from F
19
-F
4
.
HALF-BAND FILTER
**Filter Output (Non-Interpolate)
**Filter Output (Interpolate)
12 11 10
–2
12
(Sign)
2
2
2
1
2
1
0
2
0
2
11
2
10
Input Data
*Format of Half-Band Filter ouput feeding the RSL Circuitry. F
19
-F
0
corresponds to 20 MSBs of which a
13-bit window can be selected from F
19
-F
4
(see Table 3).
F
19
F
18
F
17
–2
12
(Sign)
F
2
F
1
F
0
2
–5
2
–6
2
–7
2
11
2
10
F
19
F
18
F
17
–2
13
(Sign)
F
2
F
1
F
0
2
–4
2
–5
2
–6
2
12
2
11
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參數(shù)描述
LF3370QC12 制造商:LOGIC 制造商全稱:LOGIC 功能描述:High-Definition Video Format Converter
LF33AB 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Very low drop voltage regulators with inhibit
LF33ABDT 功能描述:低壓差穩(wěn)壓器 - LDO 3.3V 0.5A Positive RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20
LF33ABDT-TR 功能描述:低壓差穩(wěn)壓器 - LDO 3.3V 0.5A Positive RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20
LF33ABP 功能描述:低壓差穩(wěn)壓器 - LDO 3.3V 0.5A Positive RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20
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