參數(shù)資料
型號： LF3370
廠商： Logic Devices Incorporated
英文描述： High-Definition Video Format Converter(高清晰度視頻格式轉(zhuǎn)換器)
中文描述： 高清晰度視頻格式轉(zhuǎn)換器（高清晰度視頻格式轉(zhuǎn)換器）
文件頁數(shù)： 8/22頁
文件大小： 256K
代理商： LF3370
DEVICES INCORPORATED
LF3370
High-Definition Video Format Converter
8
08/21/2000–LDS.3370-E
Video Imaging Products
by use of RESET only if the core is
running at half the rate of CLK (see
RESET discussion).
Furthermore, SYNC is used to identify
one interleaved data set from another.
For example, in the case of interleaved
Chroma, Cb and Cr samples must be
properly demultiplexed and synchro-
nized for proper processing.
To differentiate a Cb sample from Cr,
there needs to be a HIGH to LOW
transition on SYNC on the first Cb sample
(see Figure 4 and Figure 5); SYNC can
also be toggled on every Cb sample for re-
synchronization.
In the case that Cb is the first valid data
word, SYNC may be used only once in
device initialization and kept low until re-
synchronization is desired. Therefore,
when there is a HIGH to LOW transition
on SYNC, the following is assumed: Cb
will occur on the next rising clock edge,
Cb will occur every two clock cycles if
interleaved Chroma is presented to the
input port B
12-0
, Cb will occur every 4
clock cycles if single channel 4:2:2 inter-
leaved video is presented to the input port
A
12-0
.
SYNC control signal is also used to
synchronize the interpolation/decimation
output data from the Half-Band Filter to
the Output Multiplexer.
RESET
RESET should be used when initializing
the device for proper operation. It is used
to synchronize the LF3370 core clock to
the master clock. In the case that single
channel 4:2:2 interleaved video data is
desired either on the input or output, thus
using only one input or one output port
(not including Key data), the internal
clock rate will be half (CLK/2) of the
master clock rate (CLK). In this case,
RESET is needed to synchronize the rising
edge of CLK/2 to a known rising edge of
CLK (see Figure 4). For example, after
configuring the LF3370 and before
streaming valid data through the part, a
RESET event should be used to align the
clock edges (see Figure 5).
Furthermore, RESET will clear HF
0
and
HF
1
. A LOW state detected on RESET on
a rising edge of clock will clear flags HF
0
and HF
1
on the following rising edge of
clock. Please note HBLANK should be
used to clear HF
0
and HF
1
during normal
operation (see HBLANK discussion).
HBLANK
HBLANK is used to replace portions of
the input data with user-defined blanking
levels. When HBLANK is LOW, blanking
level words are injected into the data
stream immediately after the Input LUT
section regardless of this section being
used or not and immediately before the
Matrix Multiplier or Half-Band Filter
section. During the duration HBLANK is
F
IGURE
10.
HBLANK
AND
C
OUNTER
CLK
HBLANK
1
2
3
Data values at output of Input LUT section
In this example, HF
0
Count Value is set to 3 and HF
1
Count Value is set to 5
5
6
7
8
10
13
9
11
HF
0
HF
1
4
12
14
20-bit
COUNTER
17
16
18
*
0
1
2
3
4
5
6
7
8
9
10
0
1
4
5
2
3
15
D
N+3
D
N+4
D
N+5
D
N+6
D
N+7
D
N+8
D
N+9
D
N+10
D
N+11
D
N+3
D
N+4
D
N+5
D
N+6
D
N+7
D
N+8
D
N+9
D
N+10
D
N+11
D
N+3
D
N+4
D
N+5
D
N+6
D
N+7
D
N+8
D
N+9
D
N+10
D
N+11
D
N+3
D
N+4
D
N+5
D
N+6
D
N+7
D
N+8
D
N+9
D
N+10
D
N+11
A'
12-0*
C'
12-0*
D'
12-0*
B'
12-0*
D
N
HBLANK Word A
D
N
D
N
D
N
HBLANK Word B
HBLANK Word C
HBLANK Word D
HBLANK Word A
HBLANK Word B
HBLANK Word C
HBLANK Word D
F
IGURE
9. O
UTPUT
B
IAS
F
IGURE
8. I
NPUT
B
IAS
R0
R3
13
2
13
INBIAS
1-0
13
13
From Input Demux
R0
R3
13
2
OUTBIAS
1-0
13
13
From Core
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參數(shù)描述
LF3370QC12 制造商:LOGIC 制造商全稱:LOGIC 功能描述:High-Definition Video Format Converter
LF33AB 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Very low drop voltage regulators with inhibit
LF33ABDT 功能描述:低壓差穩(wěn)壓器 - LDO 3.3V 0.5A Positive RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20
LF33ABDT-TR 功能描述:低壓差穩(wěn)壓器 - LDO 3.3V 0.5A Positive RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20
LF33ABP 功能描述:低壓差穩(wěn)壓器 - LDO 3.3V 0.5A Positive RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20
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