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參數資料
| 型號： | LF3370 |
| 廠商： | Logic Devices Incorporated |
| 英文描述： | High-Definition Video Format Converter(高清晰度視頻格式轉換器) |
| 中文描述： | 高清晰度視頻格式轉換器（高清晰度視頻格式轉換器） |
| 文件頁數： | 6/22頁 |
| 文件大?。?/td> | 256K |
| 代理商： | LF3370 |
DEVICES INCORPORATED
LF3370
High-Definition Video Format Converter
6
08/21/2000–LDS.3370-E
Video Imaging Products
If video data is non-interleaved and
presented to input ports A
12-0
, B
12-0
, and
C
12-0
, no demultiplexing is performed.
The three channels are passed unmodified
into the LF3370 core with a delay of 3
CLK cycles. For this operation, bits 0 and
1 must both be set to 1 in Configuration
Register 0 (see Table 5).
If video data is on two channels (see
Figure 4), one channel of non-interleaved
video and one channel of interleaved
video, it is assumed that non-interleaved
video is presented to input port A
12-0
(i.e.,
Luma) and interleaved video is presented
to input port B
12-0
(i.e., Chroma). The
input demultiplexer, in this case, sepa-
rates video data on B
12-0
and outputs two
channels of separated video into the
LF3370 core with a delay of 4 CLK cycles.
For this operation, bit 0 must be set to 0
and bit 1 must be set to 1 in Configuration
Register 0 (see Table 5).
If 4:2:2 video data is on one channel
interleaved (see Figure 5), it is assumed
that interleaved video is presented to input
F
IGURE
4. I
NPUT
P
ROCESSING
4:2:2:4 (I
NTERLEAVED
C
HROMA
ON
C
HANNEL
B)
CLK
1
2
3
Demultiplexed Input Data (Output of Demux Section)
A
12-0
5
6
7
8
10
13
Y
0
Y
1
Y
2
Y
3
Y
4
Y
5
Y
6
9
11
SYNC
Y
7
Y
8
Y
9
A'
12-0**
C'
12-0**
D'
12-0**
B'
12-0**
4
12
14
D
12-0
Y
10
Y
11
Y
12
17
15
16
18
*
B
12-0
CB
0
CR
0
CB
2
CR
2
CB
4
CR
4
CB
6
CR
6
CB
8
CR
8
CB
10
CR
10
CB
12
K
0
K
1
K
2
K
3
K
4
K
5
K
6
K
7
K
8
K
9
K
10
K
11
K
12
CR'
0
CR'
2
CR'
4
CR'
6
CB'
0
CB'
2
CB'
4
CB'
6
Y'
0
Y'
1
Y'
2
Y'
3
Y'
4
Y'
5
Y'
6
Y'
7
Y'
8
K'
0
K'
1
K'
2
K'
3
K'
4
K'
5
K'
6
K'
7
K'
8
CR'
6
CB'
6
F
IGURE
NPUT
P
ROCESSING
4:2:2:4 (I
NTERLEAVED
L
UMA
/C
HROMA
ON
C
HANNEL
A)
CLK
RESET
1
2
3
Core Clock (Internally Generated and Synchronized to CLK by RESET) Used Only When Single Channel Interleaved Input or Output Video is Used.
Demultiplexed Input Data (Output of Demux Section)
A
12-0
5
6
7
8
10
13
CB
0
Y
0
CR
0
Y
1
CB
2
Y
2
CR
2
9
11
CLK/2*
SYNC
Y
3
CB
4
Y
4
A'
12-0**
C'
12-0**
CR'
0
D'
12-0**
B'
12-0**
CB'
0
4
12
14
D
12-0
K
0
K
1
K
2
K
3
K
4
Y'
0
Y'
1
Y'
2
K'
0
K'
1
K'
2
CR'
1
CB'
1
K
5
Y'
3
K'
3
CR
4
Y
5
CB
6
17
15
16
18
*
**
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相關代理商/技術參數 |
參數描述 |
|---|---|
| LF3370QC12 | 制造商:LOGIC 制造商全稱:LOGIC 功能描述:High-Definition Video Format Converter |
| LF33AB | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Very low drop voltage regulators with inhibit |
| LF33ABDT | 功能描述:低壓差穩(wěn)壓器 - LDO 3.3V 0.5A Positive RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動電壓（最大值）:307 mV 輸出電流:1 A 負載調節(jié):0.3 % 輸出端數量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-20 |
| LF33ABDT-TR | 功能描述:低壓差穩(wěn)壓器 - LDO 3.3V 0.5A Positive RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動電壓（最大值）:307 mV 輸出電流:1 A 負載調節(jié):0.3 % 輸出端數量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-20 |
| LF33ABP | 功能描述:低壓差穩(wěn)壓器 - LDO 3.3V 0.5A Positive RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動電壓（最大值）:307 mV 輸出電流:1 A 負載調節(jié):0.3 % 輸出端數量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-20 |
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