參數(shù)資料
型號(hào)： KS9245
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述： Automated CD-ROM Controller(光盤(pán)驅(qū)動(dòng)器控制器器)
中文描述： 自動(dòng)CD - ROM控制器（光盤(pán)驅(qū)動(dòng)器控制器器）
文件頁(yè)數(shù)： 60/102頁(yè)
文件大小： 419K
代理商： KS9245
SAMSUNG
Version: TM 2.4
KS9245 ATAPI Automated CD-ROM Controller
Preliminary Technical Manual
_____________________________________________________________
Do Not Copy or Release
6-10
Register 44h :
Port Control Register (Write)
Port Control Register (Read)
PCR
BIT 5
BIT 4
GPC1
GPC0
Acronym:
BIT 7
GPC3
BIT 6
GPC2
BIT 3
GP3
BIT 2
GP2
BIT 1
GP1
BIT 0
GP0
The
Port Control Register
controls the GP0, GP1, GP2 and GP3 pins as either Input/Output ports.
Bit 7 GPC3 (General Port Configuration for GP3)
When this bit is set, the GP3 pin is configured as an Output pin. When this bit is cleared, the GP3
pin is configured as an Input pin.
Bit 6 GPC2 (General Port Configuration for GP2)
When this bit is set, the GP2 pin is configured as an Output pin. When this bit is cleared, the GP2
pin is configured as an Input pin.
Bit 5 GPC1 (General Port Configuration for GP1)
When this bit is set, the GP1 pin is configured as an Output pin. When this bit is cleared, the GP1
pin is configured as an Input pin
.
Bit 4 GPC0 (General Port Configuration for GP0)
When this bit is set, the GP0 pin is configured as an Output pin. When this bit is cleared, the GP0
pin is configured as an Input pin.
Bit 3: GP3 (General Port value for GP3 )
When the GP3 pin is configured as an output pin, writing a “1” to this bit sets the GP3 Pin high.
Writing a “0” resets the GP3 pin low. When the GP3 pin is configured as an input pin, reading this
bit obtains the state of the GP3 pin.
Bit 2: GP2 (General Port value for GP2 )
When the GP2 pin is configured as an output pin, writing a “1” to this bit sets the GP2 Pin high.
Writing a “0” resets the GP2 pin low. When the GP2 pin is configured as an input pin, reading this
bit obtains the state of the GP2 pin.
Bit 1: GP1 (General Port value for GP1 )
When the GP1 pin is configured as an output pin, writing a “1” to this bit sets the GP1 Pin high.
Writing a “0” resets the GP1 pin low. When the GP1 pin is configured as an input pin, reading this
bit obtains the state of the GP1 pin.
Bit 0: GP0 (General Port value for GP0 )
When the GP0 pin is configured as an output pin, writing a “1” to this bit sets the GP0 Pin high.
Writing a “0” resets the GP0 pin low. When the GP0 pin is configured as an input pin, reading this
bit obtains the state of the GP0 pin.
Register 45h :
BIT 7
Reserved
BIT 5
BIT 6
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Reserved
This register is reserved.
Register 46h :
Reserved
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