參數(shù)資料
型號(hào)： KS9245
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述： Automated CD-ROM Controller(光盤驅(qū)動(dòng)器控制器器)
中文描述： 自動(dòng)CD - ROM控制器（光盤驅(qū)動(dòng)器控制器器）
文件頁數(shù)： 21/102頁
文件大?。?/td> 419K
代理商： KS9245
SAMSUNG
Version: TM 2.4
KS9245 ATAPI Automated CD-ROM Controller
Preliminary Technical Manual
_____________________________________________________________
Do Not Copy or Release
1-21
RSTB
(Chip Reset)
A logic low input will reset the KS9245. All host interface outputs are set to the high-impedance state.
The registers of KS9245 will be initialized as their default values.
Pin 17
ARSTB
(ATAPI 08 Cmd Reset)
A logic low pulse with 40 usec will be asserted when host issues the ATAPI Reset Command (08h) to
the KS9245. This signal could use as the pulse to reset the micro-controller. The output of 60 usec
clock pulse is assumed that the System Clock of 33.8688 MHz is used.
Pin 29
XIN/SYSCLK
(Crystal or System clock input)
This signal is the crystal or CMOS-level clock input as system clock. The KS9245 contains an
internal resister between XIN/XOUT. There is no external resister required to connect these pins. The
standard crystal or CMOS-level clock is either 33.8688 MHz or 50.8MHz.
Pin 28
XOUT
(Oscillator output)
This signals is the oscillator output.
Pin 27
XSEL
(System Clock Select)
The KS9245 supports two frequencies. This pin can use an external jumper select to configure for
either 33.86MHz or 50.8MHz. This pin should be pulled-up by a 22K Ohm resistor for 50.8 MHz
operation, and strapped-down by a 10K Ohm resistor for 33.86MHz operation.
Pin 86
GPI 0-3
(general purpose Input/Output Lines)
These signals are used as general purpose input pins. The Input or Output can be configured by
setting or clearing the
GPC3, GPC2,
GPC1, GPC0
bits in
Port Control Register
(44h, bit 7,6,5, 4)
and
APCE
bit in Global
Control Register
(2Fh, bit3) is cleared.
Pin 13,14, 15, 16
1.4.7 Pin Description in Audio DAC Interface
DAUO
( Digital Audio Output)
This pin is used to output the digital audio as IEC-958 format. This bit is enabled when
APCE
bit in
Global
Control Register
(2Fh, bit 3) is set.
ADAT
(Audio Data output)
This pin is used to as a audio data output pin when the audio playback in CAV mode is selected to
be used. This bit is enabled when
APCE
bit in Global
Control Register
(2Fh, bit 3) is set.
ABCK
(Audio bit clock output)
This pin is used to as a audio bit clock output pin. This bit is enabled when
APCE
bit in Global
Control Register
(2Fh, bit 3) is set.
AWCK
(Audio word clock output)
This pin is used to as a audio word clock output pin. This bit is enabled when
APCE
bit in Global
Control Register
(2Fh, bit 3) is set.
Pin 16
Pin 15
Pin 14
Pin 13
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