參數(shù)資料
型號(hào)： KS9245
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述： Automated CD-ROM Controller(光盤驅(qū)動(dòng)器控制器器)
中文描述： 自動(dòng)CD - ROM控制器（光盤驅(qū)動(dòng)器控制器器）
文件頁(yè)數(shù)： 58/102頁(yè)
文件大?。?/td> 419K
代理商： KS9245
SAMSUNG
Version: TM 2.4
KS9245 ATAPI Automated CD-ROM Controller
Preliminary Technical Manual
_____________________________________________________________
Do Not Copy or Release
6-8
Bit 6: ESH1 (Error flag for Subheader 1 - Channel Number)
When this bit is set, the error flag of the Channel Number Byte in both subheaders is set. When
this bit is cleared, the error flag of the Channel Byte in either of the subheaders is cleared.
Bit 5: ESH2 (Error flag for Subheader 2 - Submode)
When this bit is set, the error flag of the Submode Byte in both subheaders is set. When this bit is
cleared, the error flag of the Submode Byte in either of the subheaders is cleared.
Bit 4: ESH3 (Error flag for Subheader 3 - Coding Information)
When this bit is set, the error flag of the Coding Information Byte in both subheaders is set. When
this bit is cleared, the error flag of the Coding Information Byte in either of the subheaders is
cleared.
Bit 3: Emin (Error flag for Header Min Byte)
When this bit is set, the error flag of the Header Min Byte is set. When this bit is cleared, the error
flag of the Header Min Byte is cleared.
Bit 2: Esec (Error flag for Header Sec Byte)
When this bit is set, the error flag of the Header Sec Byte is set. When this bit is cleared, the error
flag of the Header Sec Byte is cleared.
Bit 1: Eframe (Error flag for Header Frame Byte)
When this bit is set, the error flag of the Header Frame Byte is set. When this bit is cleared, the
error flag of the Header Frame Byte cleared.
Bit 0: Emode (Error flag for Header Mode Byte)
When this bit is set, the error flag of the Header Mode Byte is set. When this bit is cleared, the
error flag of the Header Mode Byte is cleared.
Register 40h :
BIT 7
Reserved
BIT 5
BIT 6
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Reserved
This register is reserved.
Register 41h :
Acronym:
BIT 7
SCrcErr
Subcode Status Register (Read)
SSR
BIT 5
BIT 4
BIT 6
SubErr
BIT 3
BIT 2
BIT 1
BIT 0
Reserved
The
Subcode Status Register
provides the results of subcode operations.
Bit 7: SCrcErr (Subcode CRC Error)
When this bit is set, a CRC error in exists in the Q channel subcode. When this bit is cleared, no
CRC error exists in the Q channel subcode.
Bit 6: SubErr (Subcode Buffer Error)
When this bit is set, one of the following errors occurred:
A subcode sync word is not found.
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