參數(shù)資料
型號: KS9245
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: Automated CD-ROM Controller(光盤驅(qū)動器控制器器)
中文描述: 自動CD - ROM控制器(光盤驅(qū)動器控制器器)
文件頁數(shù): 38/102頁
文件大?。?/td> 419K
代理商: KS9245
SAMSUNG
Version: TM 2.4
KS9245 ATAPI Automated CD-ROM Controller
Preliminary Technical Manual
_____________________________________________________________
Do Not Copy or Release
3-3
Register 0Fh :
Acronym:
BIT 7
ACacheE
Transfer Sequence Status Register (Read)
TSS
BIT 5
BIT 4
BIT 3
Reserved
BIT 6
ACplE
BIT 2
SPause
BIT 1
WRDir
BIT 0
HxfrBsy
The
Transfer Sequence Status Register
indicates the status of the
Transfer Command Register
.
Bit 7: ACacheE (Automated Cache Control)
When this bit is set, Auto Cache is enabled. When this bit is reset, Auto Cache is disabled.
Bit 6: ACplE (Automated Command Completion Enabled)
When this bit is set, the automated ATAPI Command Completion Sequence is enabled
.
When this
bit is reset, the automated ATAPI Command Completion Sequence is disabled.
Bit 5-3: Reserved
These bits are reserved for future enhancements.
Bit 2: SPause (Start Host Transfer Pause Operation)
When this bit is set, the transfer pause operation is in process. When this bit is reset, no pause
operation is performed.
Bit 1: WRDir (Write/Read Direction Control)
When this bit is set, the transfer operation is a write from the host to the KS9245. When this bit is
reset, the transfer operation is a read from the KS9245 to the host.
Bit 0: HxfrBsy (Host Transfer Operation Busy)
When this bit set, the host transfer operation is in progress. When this bit is cleared, the host
transfer has completed.
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