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參數(shù)資料
| 型號： | KS9245 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | Automated CD-ROM Controller(光盤驅(qū)動器控制器器) |
| 中文描述： | 自動CD - ROM控制器（光盤驅(qū)動器控制器器） |
| 文件頁數(shù)： | 54/102頁 |
| 文件大?。?/td> | 419K |
| 代理商： | KS9245 |
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SAMSUNG
Version: TM 2.4
KS9245 ATAPI Automated CD-ROM Controller
Preliminary Technical Manual
_____________________________________________________________
Do Not Copy or Release
6-4
Decoder Operation State
DecWrt
Decen
0
0
1
x
x
1
1
Other Values
SubMon
0
0
0
0
1
0
0
AudWrt
0
0
0
1
0
0
0
ECCRQ
0
0
0
x
x
1
0
Decscen
0
1
1
x
x
1
0
Operation Status
Decoder Stop Mode
Monitor Mode
Buffering Only Mode
Audio Buffering Mode
Subcode Monitor Mode
ECC Mode
Test Mode
Invalid Mode
0
1
1
x
x
1
1
Bit 7-6: Reserved
These bits are reserved for future enhancement.
Bit 5: SubMon (Subcode Monitor Mode Enable)
When this bit is set and the AudWrt bit is cleared, the decoder is placed into the Subcode Monitor
Mode.
Bit 4: AudiWrt (Audio Buffer Mode Enable)
When this bit is set, the KS9245 will buffer the CD-DA data.
Bit 3: ECCRQ (Error Correction Request)
Writing a “1” to this bit when both the
Decen
and
DecWrt
bits are set causes the decoder logic to
switch into ECC Mode.
Bit 2: DecWrt (Decoder Writing/Buffering Enable)
Writing a “1” to this bit when the
Decen
bit is set causes the buffering for the main data streams,
DSP subcode, C2PO Error Flags to become active
.
Bit 1: Decen (Decoder Operation Enable)
When this bit set, the CD decoder operation is active for processing the incoming DSP data.
Bit 0: Descen (Descrambler Enabled)
When this bit set, the descrambler logic is active.
Register 3Bh :
ECC Control 1 Register (Read)
ECC Control 1 Register (Write)
ECC1
BIT 5
BIT 4
Reserved
Acronym:
BIT 7
XAMode
BIT 6
BIT 3
Edcen
BIT 2
EccPen
BIT 1
EccQen
BIT 0
EraCorr
The
ECC Control 1 Register
controls the ECC, EDC, and decoder operations.
Bit 7: XAMode (CD XA Data Mode Enable)
When this bit cleared, the ECC/EDC logic assumes the data block is Yellow Book Mode 0,1,2.
When this bit is set, the ECC/EDC logic assumes the data block is either XA Mode 2 Form 1 or
Mode 2 Form 2.
Bit 6-4: Reserved
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| KS9246 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:ATAPI AUTOMATED CD-ROM CONTROLLER WITH EMBEDDED DRAM |
| KS926S2 | 制造商:FUJI 制造商全稱:Fuji Electric 功能描述:LOW LOSS SUPER HIGH SPEED RECTIFIER |
| KS926S2_07 | 制造商:FUJI 制造商全稱:Fuji Electric 功能描述:LOW LOSS SUPER HIGH SPEED RECTIFIER |
| KS9282B | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:CMOS INTEGRATED CIRCUIT |
| KS9286 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:DIGITAL SIGNAL PROCESSOR for CDP |
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