參數(shù)資料
型號(hào): ISP1761BE,518
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQFP128
封裝: 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT425-1, LQFP-128
文件頁數(shù): 89/164頁
文件大?。?/td> 767K
代理商: ISP1761BE,518
ISP1761_5
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 05 — 13 March 2008
29 of 163
NXP Semiconductors
ISP1761
Hi-Speed USB OTG controller
Table 7 shows the status of output pins during hybrid mode.
7.8 Overcurrent detection
The ISP1761 can implement a digital or analog overcurrent detection scheme. Bit 15 of
the HW Mode Control register can be programmed to select the analog or digital
overcurrent detection. An analog overcurrent detection circuit is integrated on-chip. The
main features of this circuit are self reporting, automatic resetting, low-trip time and low
cost. This circuit offers an easy solution at no extra hardware cost on the board. The port
power will automatically be disabled by the ISP1761 on an overcurrent event occurrence,
by de-asserting the PSWn_N signal without any software intervention.
When using the integrated analog overcurrent detection, the range of the overcurrent
detection voltage for the ISP1761 is 45 mV to 100 mV. Calculation of the external
components must be based on the 45 mV value, with the actual overcurrent detection
threshold usually positioned in the middle of the interval.
This gure shows the LQFP pinout. For the TFBGA ballout, see Table 2.
A 4.7
F-to-10 F electrolytic or tantalum capacitor is required on any one of the pins 5, 50 or 118.
All the electrolytic or tantalum capacitors must be of LOW ESR type (0.2
to 2 ).
Fig 9.
Hybrid mode
Table 7.
Pin status during hybrid mode
Pins
VCC(I/O)
VCC(5V0)
Status
DATA[31:0], A[17:1], TEST, HC_IRQ, DC_IRQ,
HC_DREQ, DC_DREQ, HC_DACK, DC_DACK,
HC_SUSPEND/WAKEUP_N,
DC_SUSPEND/WAKEUP_N
on
normal
on
off
high-Z
off
X
undened
CS_N, RESET_N, RD_N, WR_N
on
X
input
off
X
undened
004aaa676
6, 7
VCC(I/O)
ISP1761BE
3.3 V to 5 V
VCC(5V0)
10, 40, 48,
59, 67, 75,
83, 94,
104, 115
REG1V8
85
10 F
100 nF
1.65 V to 3.6 V
REG1V8
5, 50, 118
100 nF
REG3V3
9
10 F
100 nF
126
3.3 V
VCC(C_IN)
100 nF
controlled by the CPU
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