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| 型號： | ISP1563BM |
| 廠商： | ST-ERICSSON |
| 元件分類： | 總線控制器 |
| 英文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQFP100 |
| 封裝： | 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-420-1, LQFP-100 |
| 文件頁數(shù)： | 28/102頁 |
| 文件大?。?/td> | 466K |
| 代理商： | ISP1563BM |
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ISP1563_2
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 02 — 15 March 2007
31 of 102
NXP Semiconductors
ISP1563
HS USB PCI Host Controller
[1]
PM: Power Management.
8.2.3.6
Data register
The Data register is an optional, 1-byte register that provides a mechanism for the
function to report state dependent operating data, such as power consumed or heat
dissipated. Table 41 shows the bit description of the register.
9.
I2C-bus interface
A simple I2C-bus interface is provided in the ISP1563 to read customized vendor ID,
product ID and some other conguration bits from an external EEPROM.
The I2C-bus interface is for bidirectional communication between ICs using two serial bus
wires: SDA (data) and SCL (clock). Both lines are driven by open-drain circuits and must
be connected to the positive supply voltage through pull-up resistors, when in use;
otherwise, they must be connected to ground.
9.1 Protocol
The I2C-bus protocol denes the following conditions:
Bus free: both SDA and SCL are HIGH
START: a HIGH-to-LOW transition on SDA, while SCL is HIGH
STOP: a LOW-to-HIGH transition on SDA, while SCL is HIGH
Data valid: after a START condition, data on SDA is stable during the HIGH period of
SCL; data on SDA may only change while SCL is LOW
Each device on the I2C-bus has a unique slave address, which the master uses to select a
device for access.
The master starts a data transfer using a START condition and ends it by generating a
STOP condition. Transfers can only be initiated when the bus is free. The receiver must
acknowledge each byte by using a LOW level on SDA during the ninth clock pulse on
SCL.
For detailed information, refer to
The I2C-bus Specication Version 2.1.
D3hot
B2, B3
clock stopped and PCI VCC removed from secondary
bus (B3 only); for denition of B2_B3#, see Table 39.
D3cold
B3
none
Table 40.
PCI bus power and clock control …continued
Originating device’s
bridge PM state[1]
Secondary bus
PM state[1]
Resultant actions by bridge (either direct or indirect)
Table 41.
DATA - Data register bit description
Address: Value read from address 34h + 7h
Legend: * reset value
Bit
Symbol
Access
Value Description
7 to 0
DATA[7:0]
R
00h*
DATA: This register is used to report the state dependent data requested by the
D_S eld of the PMCSR register. The value of this register is scaled by the value
reported by the DS eld of the PMCSR register.
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| ISP1563BM,518 | 功能描述:USB 接口集成電路 USB 2.0 4PORT PCI RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1563BM,551 | 功能描述:USB 接口集成電路 DO NOT USE ORDER -T OR NO "-" RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1563BM,557 | 功能描述:USB 接口集成電路 USB 2.0 4PORT PCI HOST CONTROL RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1563BM518 | 制造商:ST-Ericsson 功能描述:CONTROLLER USB PCI HOST 128LQFP |
| ISP1563BMGA | 功能描述:IC USB HOST CTRL HI-SPD 128LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 標(biāo)準(zhǔn)包裝:3,000 系列:- 應(yīng)用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2 |
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