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| 型號(hào)： | IS42G32256-8PQ |
| 廠商： | INTEGRATED SILICON SOLUTION INC |
| 元件分類： | DRAM |
| 英文描述： | 256K x 32 x 2 (16-Mbit) SYNCHRONOUS GRAPHICS RAM |
| 中文描述： | 512K X 32 SYNCHRONOUS GRAPHICS RAM, 6.5 ns, PQFP100 |
| 封裝： | 14 X 20 MM , PLASTIC, QFP-100 |
| 文件頁數(shù)： | 7/52頁 |
| 文件大?。?/td> | 456K |
| 代理商： | IS42G32256-8PQ |
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IS42G32256
Integrated Silicon Solution, Inc.
ADVANCE INFORMATION
SR037-0C
09/10/98
7
ISSI
Table 5. SGRAM vs SDRAM
SDRAM Function
DSF
SGRAM Function
MRS
Bank Active
Write
L
H
L
H
L
H
MRS
SMRS
Bank Active
with
Write per bit
Disable
Bank Active
with
Write per bit
Enable
Normal Block
Write
Write
Notes:
1. If DSF is low, SGRAM functionality is identical to SDRAM functionality.
2. SGRAM can be used as a unified memory by the appropriate DSF control; SGRAM = Graphic Memory + Main Memory.
Table 6. Mode Register Field Table to Program Modes
Register Programmed with MRS
Address
Function
A10
RFU
(1)
A9
A8, A7
TM
A6, A5, A4
CAS Latency
A3
BT
A2, A1, A0
Burst Length
W.B.L.
(2)
POWER UP SEQUENCE
1. Apply power and start clock, attempt to maintain DKE = “H” and the other pins are NOP condition at the inputs.
2. Maintain stable power, stable clock and NOP input condition for a minimum of 200
μ
s.
3. Issue precharge commands for all banks of the devices.
4. Issue two or more auto-refresh commands.
5. Issue a mode register set command to initialize the mode register.
6. Sequence of 4 and 5 may be changed.
The device is now ready for normal operation.
Notes:
1.
2.
3.
4.
RFU (Reserved for Future Use) should stay “0” during MRS cycle.
If A9 is high during MRS cycle, “Burst Read Single Bit Write” function will be enabled.
The full column burst (256-bit) is available only at Sequential mode of burst type.
If LC and LM both high (1), data of mask and color register will be unknown.
Test Mode
CAS Latency
Burst Type
Burst Length
A8 A7
0
0
1
1
Type
A6
0
0
0
0
1
1
1
1
A5
0
0
1
1
0
0
1
1
A4
0
1
0
1
0
1
0
1
Latency
Reserved
—
2
3
Reserved
Reserved
Reserved
Reserved
A3
0
1
Type
A2 A1 A0
0
0
0
0
0
1
0
1
1
0
1
0
1
1
1
1
BT=0
1
2
4
8
Reserved
Reserved
Reserved
256(Full)
(3)
BT=1
Reserved
Reserved
4
8
Reserved
Reserved
Reserved
Reserved
0
1
0
1
Mode Register Set
Vendor
Use
Only
Write Burst Length
Length
Burst
Single Bit
Sequential
Interleave
0
1
0
1
0
1
0
1
A9
0
1
Address
Function
A10, A9, A8, A7
X
A6
LC
(4)
A5
LM
(4)
A4, A3, A2, A1, A0
X
Load Color
A6 Function
0
Disable
1
Enable
Load Mask
A5 Function
0
Disable
1
Enable
Special mode Register Programmed with SMRS
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IS42G32256 | 256K x 32 x 2 (16-Mbit) SYNCHRONOUS GRAPHICS RAM |
| IS42S16100C1 | 512K Words x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IS42S16100C1-5T | 512K Words x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IS42S16100C1-5TL | 512K Words x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IS42S16100C1-6T | 512K Words x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IS42K | 制造商:IDEC Corporation 功能描述:SENS.IND. 10-30VDC NPN NC |
| IS42KS | 制造商:IDEC Corporation 功能描述:SENS.IND. 10-30VDC NPN NC |
| IS42L | 制造商:IDEC Corporation 功能描述:SENS.IND. 10-30VDC NPN NC |
| IS42LS16800A | 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:16Meg x 8, 8Meg x16 & 4Meg x 32 128-MBIT SYNCHRONOUS DRAM |
| IS42LS16800A-10B | 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:16Meg x 8, 8Meg x16 & 4Meg x 32 128-MBIT SYNCHRONOUS DRAM |
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