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參數(shù)資料
| 型號： | IS42G32256-8PQ |
| 廠商： | INTEGRATED SILICON SOLUTION INC |
| 元件分類： | DRAM |
| 英文描述： | 256K x 32 x 2 (16-Mbit) SYNCHRONOUS GRAPHICS RAM |
| 中文描述： | 512K X 32 SYNCHRONOUS GRAPHICS RAM, 6.5 ns, PQFP100 |
| 封裝： | 14 X 20 MM , PLASTIC, QFP-100 |
| 文件頁數(shù)： | 35/52頁 |
| 文件大?。?/td> | 456K |
| 代理商： | IS42G32256-8PQ |
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IS42G32256
Integrated Silicon Solution, Inc.
ADVANCE INFORMATION
SR037-0C
09/10/98
35
ISSI
Notes:
1. All inputs can be “Don’t Care” when
CS
is high at the CLK high going edge.
2. Bank active and read/write are controlled by A10.
A10
Active and Read/Write
0
Bank A
1
Bank B
3. Enable and disable auto precharge function are controlled by A9 in read/write command.
A9
A10
Operation
0
0
Disable auto precharge, leave bank A active at end of burst.
0
1
Disable auto precharge, leave bank B active at end of burst.
1
0
Enable auto precharge, precharge bank A at end of burst.
1
1
Enable auto precharge, precharge bank B at end of burst.
4. A9 and A10 control bank precharge when precharge command is asserted.
A9
A10
Precharge
0
0
Bank A
0
1
Bank B
1
X
Both Bank
5. Enable and disable Write-per Bit function are controlled by DSF in Row Active command.
A10
DSF
Operation
0
L
Bank A row active, disable write per bit function for bank A.
0
H
Bank A row active, enable write per bit function for bank A.
1
L
Bank B row active, disable write per bit function for bank B.
1
H
Bank B row active, enable write per bit function for bank B.
6. Block write/normal write is controlled by DSF.
DSF
Operation
L
Normal write
H
Block write
Minimum cycle time
t
CCD
t
BWC
Figure 19. Single Bit Read-Write-Read Cycle (Same Page) at
CAS
Latency = 3, Burst Length = 1 (continued)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IS42G32256 | 256K x 32 x 2 (16-Mbit) SYNCHRONOUS GRAPHICS RAM |
| IS42S16100C1 | 512K Words x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IS42S16100C1-5T | 512K Words x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IS42S16100C1-5TL | 512K Words x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IS42S16100C1-6T | 512K Words x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IS42K | 制造商:IDEC Corporation 功能描述:SENS.IND. 10-30VDC NPN NC |
| IS42KS | 制造商:IDEC Corporation 功能描述:SENS.IND. 10-30VDC NPN NC |
| IS42L | 制造商:IDEC Corporation 功能描述:SENS.IND. 10-30VDC NPN NC |
| IS42LS16800A | 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:16Meg x 8, 8Meg x16 & 4Meg x 32 128-MBIT SYNCHRONOUS DRAM |
| IS42LS16800A-10B | 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:16Meg x 8, 8Meg x16 & 4Meg x 32 128-MBIT SYNCHRONOUS DRAM |
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