
March 17, 1995
11
IBM
RGB524
3.3.2
8 BPP
With 8 BPP format 4 pixels (32 bit VRAM width) or 8
pixels (64 bit VRAM width) are obtained for each pixel
port data access.
8 BPP can be indirect or direct, under control of the B8
DCOL bit of the 8 BPP Control register. If indirect, the 8
bits are masked with the Pixel Mask register and pre-
sented to the red, green, and blue palettes as indices
into the 256 entries of each palette.
If direct, the 8 bits are presented to the red, green, and
blue DACs. Note that since the red, green, and blue col-
ors are identical the displayed image will be mono-
chrome.
3.3.3
16 BPP
With 15 BPP or 16 BPP format 2 pixels (32-bit VRAM
width) or 4 pixels (64-bit VRAM width) are obtained for
each pixel port data access. The 15 or 16 bits are
expanded to 24 bits, under control of the 16 BPP Control
register.
The 16 BPP Control register provides a number of
options for using the 16 BPP format:
1.
The incoming pixel can be 15 bits (555 format) or 16
bits (565 format).
2.
The color path can be indirect (through the palettes)
or direct (bypassing the palettes). Also, with 555
format, the 16th bit can be used to dynamically
switch on a pixel-by-pixel basis between indirect
and direct color.
3.
If indirect color is selected, the addressing of the
palettes can be “sparse” (pixel bits used as high
order palette address bits) or “contiguous” (pixel
bits used as low order palette address bits).
4.
If indirect color with contiguous addressing is
selected, the palettes can be divided into partitions.
The PARTITION bits of the Palette Control register
are used to select the partition by lling in the
upper palette address bits. With 555 format 8
partitions are available; with 565 format there are 4
partitions.
5.
If direct color is used the pixel bits are sent to the
DAC high order bits. The low order bits can be zero
lled, or the low order bits can be lled with the
high order bits of the pixel data. (See description of
ZIB/LIN bit below.)
If dynamic bypass is selected the following conditions
will apply:
1.
The format will be forced to 15 bit (555), with the
unused 16th bit now used to control indirect/direct
color selection.
2.
The indirect color path will be forced to use sparse
addressing of the palettes. Partitions cannot be
used.
3.
The direct color path will force the low order bits to
the DACs to be zero lled (ZIB). LIN format cannot
be used.
4.
The Pixel Mask will mask the pixel data regardless
of whether or not the palette is bypassed.
3.3.3.1 555/565 Formats
The 555/565 bit determines if the pixel is 15 bits (5:5:5
format) or 16 bits (5:6:5 format). The format designator,
5:5:5 or 5:6:5, refer to the bit allocations, high-to-low, for
red:green:blue.
With 15 BPP the high order bit of each two bytes
(PIX[15], PIX[31], PIX[47], PIX[63]) is discarded unless
dynamic bypass is specied (B16 DCOL bits = 01). With
dynamic bypass, this bit is used for indirect/direct color
selection.
As noted above setting the mode to dynamic bypass will
force the format to 555 regardless of the setting of the
555/565 bit.
3.3.3.2 Color Path Selection
The B16 DCOL bits are used to select one of:
1.
Indirect color always (00).
2.
Direct color always (11).
3.
Dynamic selection of indirect or direct color (01).
The expansion to 24 bits varies depending on whether
the color path is indirect or direct.
Indirect Color: The palette addressing can be sparse
or contiguous and is controlled by the SPR/CNT bit.
With sparse addressing the pixels will address 32 loca-
tions each for the red and blue palettes, and 32 locations
for green in 555 format or 64 locations for green in 565
format. With the lower address bits set to zeroes the
locations accessed will be “scattered” through the pal-
ettes, with the intermediate locations unused.
With contiguous addressing the PARTITION bits of the
Palette Control register are used for the high order pal-
ette address bits, and the access within each palette is