參數(shù)資料
型號(hào): IBM37RGB524CF17A
元件分類: 顯示控制器
英文描述: 1600 X 1280 PIXELS PALETTE-DAC DSPL CTLR, PQFP144
封裝: QFP-144
文件頁數(shù): 11/72頁
文件大?。?/td> 509K
代理商: IBM37RGB524CF17A
March 17, 1995
13
IBM
RGB524
3.3.5
32 BPP
With 32 BPP format 1 pixel (32-bit VRAM width) or 2
pixels (64-bit VRAM width) are obtained for each pixel
port data access. For each 32 bits accessed, the low three
bytes (24 bits) are used for the three colors, with 8 bits
each for red, green, and blue.
32 BPP mode is controlled with the 32 BPP Control reg-
ister. This register has the B32 DCOL bits, which are
used to select one of:
1.
Indirect color always (00).
2.
Direct color always (11).
3.
Dynamic selection of indirect or direct color (01).
With indirect color always or direct color always the
high order byte is unused. (PIX[31:24] and PIX[63:56])
With dynamic selection (dynamic bypass), the “25th” bit
is used as the indirect/direct control bit (PIX[24],
PIX[56]) and the remaining bits of the high order byte
are unused. (PIX[31:25] and PIX[63:57].) The pixel data
in this mode is masked by the Pixel Mask regardless of
whether or not the palette is bypassed.
For indirect color, the 8 bits of red, green, and blue are
each masked by the Pixel mask, and then presented to
the red, green, and blue palettes as indices into the 256
entries of each palette.
For direct color, the 8 bits of red, green, and blue are pre-
sented to the DACs.
3.3.5.1 Dynamic Bypass
As described above the selection of “dynamic bypass”
mode uses the “25th” bit of the incoming 32-bit pixels as
a control bit to select, on a pixel-by-pixel basis, the indi-
rect (color lookup) or direct (lookup bypass) path.
The meaning of this bit depends on the BY32 bit in the
32 BPP Control register. When BY32 = 0 the incoming
control bit forces the bypass. That is, when the control
bit is 1 the palette is bypassed (direct color), and when 0
the palette is not bypassed (indirect color).
When BY32 = 1 the meaning of the incoming control bit
is reversed; it now forces a lookup. That is, when the
control bit is 1 the palette is used (color lookup), but
when 0 the palette is bypassed (direct color).
3.4
6 Bit Linear Palette Output
The 6BIT LIN (6 bit linear) bit of the Palette Control
register affects the format of the color data read from
the palettes and presented to the DACs in indirect color
mode. It only has effect when the color resolution is set
to 6 bits with the COL RES bit of the Miscellaneous
Control 2 register and DCOL CNTL is set to indirect
color.
If the palettes contain data with the two low order bits
set to 00 (which will be the case when the palettes are
loaded with COL RES set to 6 bits), without special pro-
cessing the data values presented to the DACs will
range from 0x00 through 0xfd. The maximum output of
the DACs will be approximately 1.5% less than full scale
(0xff). This will occur when 6BIT LIN is set to 1.
When 6BIT LIN is set to 0 (the default), then the out-
puts of the palettes will be modied to allow the DACs to
reach full scale output. The modication consists of dis-
carding the two low order bits from the palettes, and
substituting the two high order bits for the two low
order bits presented to the DACs. (i.e., the palette bits
presented to a DAC will be bits 7 6 5 4 3 2 7 6).
With this bit substitution there will be a “l(fā)inear” map-
ping of the palette data range (0x00 – 0xfd) to the DAC
data range (0x00 – 0xff), and the DACs will operate over
their full range.
If COL RES = 1 (8-bit color resolution) the palette out-
puts are presented to the DACs unchanged, and 6BIT
LIN has no effect. The DACs will operate over the 8-bit
range from completely off to full scale on.
Palette linear output is intended for emulation of the
VGA 6-bit DACs in which the palette is loaded with 6-bit
colors in the 6 high-order bits by setting COL RES to 6-
bits. However, regardless of how the palette was loaded
or what the pixel format is (VGA, 4, 8, 15/16, 24, 32
BPP), if enabled (DCOL = indirect, COL RES = 6 bit,
6BIT LIN = 0) the palette outputs will be affected as dis-
cussed above.
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