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參數(shù)資料
| 型號： | IBM25PPC750L-FB0B333W |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 333 MHz, RISC PROCESSOR, CBGA360 |
| 封裝： | 25 X 25 MM, 1.27 MM PITCH, CERAMIC, BGA-360 |
| 文件頁數(shù)： | 5/46頁 |
| 文件大小： | 610K |
| 代理商： | IBM25PPC750L-FB0B333W |
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9/30/99
Version 2.0
Datasheet
Page 9
PowerPC 750 SCM RISC Microprocessor
Preliminary Copy
PID8p-750
The next table provides the power consumption for the PID8p-750.
Power Consumption
See Table “Recommended Operating Conditions1,2,3,” on page 6, for operating conditions
Processor CPU Frequency
Unit
Notes
300
333
350
366
375
400
433
450
466
500
Full-On Mode
Typical
3.8
4.1
4.2
4.4
4.5
4.7
5.0
5.2
5.5
6.0
W
1,3,5
Maximum
4.5
5.0
5.2
5.5
5.7
6.0
6.3
6.6
6.8
7.5
W
1,2,4,5
Doze Mode
Maximum
1.7
1.8
1.9
2.1
2.2
2.3
W
1,2,5
Nap Mode
Maximum
250
mW
1,5
Sleep Mode
Maximum
TBD
mW
1,5
Note:
1. These values apply for all valid 60x bus and L2 bus ratios. The values do not include I/O Supply Power (OVDD and L2OVDD) or PLL/DLL supply power
(AVDD and L2AVDD). OVDD and L2OVDD power is system dependent, but is typically <10% of VDD power. Worst case power consumption for AVDD = 15mW
and L2AVDD = 15mW.
2. Maximum power is measured at VDD = AVDD=L2AVDD=2.1V, OVDD=L2OVDD=3.3V, 65°C in a system executing worst case benchmark sequences.
3. Typical power is an average value measured at VDD = AVDD = L2AVDD = 2.05V, OVDD = L2OVDD = 3.3V, 45
°C, in a system executing typical applications
and benchmark sequences.
4. Maximum power at 85
°C may be derived by adding 0.1W to the maximum power number at 65°C. Similarly, maximum power at 105°C may be derived by
adding 0.3W to the maximum power at 65
°C.
5. Guaranteed by design and characterization, and is not tested.
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