參數(shù)資料
型號(hào)： IBM25PPC750L-FB0B333W
元件分類(lèi)： 微控制器/微處理器
英文描述： 32-BIT, 333 MHz, RISC PROCESSOR, CBGA360
封裝： 25 X 25 MM, 1.27 MM PITCH, CERAMIC, BGA-360
文件頁(yè)數(shù)： 30/46頁(yè)
文件大?。?/td> 610K
代理商： IBM25PPC750L-FB0B333W
Page 32
Version 2.0
Datasheet
9/30/99
PowerPC 750 SCM RISC Microprocessor
PID8p-750
Preliminary Copy
L2CLKOUTB network could also be used depending on the loading, frequency, and number of SRAMs.
Output Buffer DC Impedance
The PID8p-750 60x and L2 I/O drivers were characterized over process, voltage, and temperature. To mea-
sure Z0, an external resistor is connected to the chip pad, either to OVDD or GND. Then the value of such
resistor is varied until the pad voltage is OV
The output impedance is actually the average of two components, the resistances of the pull-up and pull-
down devices. When Data is held low, SW1 is closed (SW2 is open), and R
N is trimmed until Pad = OVDD/2. RN
then becomes the resistance of the pull-down devices. When Data is held high, SW2 is closed (SW1 is open),
and R
P is trimmed until Pad = OVDD/2. RP then becomes the resistance of the pull-up devices. With a properly
designed driver R
P and RN are close to each other in value, then Z0 = (RP + RN)/2.
The following table summarizes the impedance a board designer would design to for a typical process. These
values were derived by simulation at 65
°C. As the process improves, the output impedance will be lower by
several ohms than this typical value.
Figure 17. Driver Impedance Measurement
Impedance Characteristics
V
DD = 1.9VDC, L2OVDD=OVDD = 3.3VDC,
T
J
= 65°C
Process
60x
L2
Symbol
Unit
Typical
43
38
Z
0
Data
OV
DD
R
N
SW2
SW1
Pad
R
P
GND
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