參數(shù)資料
型號(hào)： IBM25PPC750GLECR5HA3T
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 1000 MHz, RISC PROCESSOR, CBGA292
封裝： 21X 21 MM, 1 MM PITCH, CERAMIC, BGA-292
文件頁(yè)數(shù)： 55/76頁(yè)
文件大小： 1031K
代理商： IBM25PPC750GLECR5HA3T
Datasheet
DD1.X
Preliminary
IBM PowerPC 750GL RISC Microprocessor
750GL_ds_body.fm.1.2
March 13, 2006
System Design Information
Page 59 of 74
T
a
b
le
5
-6
.
In
put/
O
u
tpu
tUs
age
750G
L
Signal
Nam
e
Act
ive
Level
Input
/
Ou
tp
u
t
Us
age
G
roup
Input
/O
u
tput
wit
h
In
te
rnal
P
u
llup
Resist
ors
Le
vel
P
rot
ec
t
Required
Ext
e
rnal
R
e
si
st
or
Comm
ent
s
N
ot
es
A1
V
DD
—
Powe
rS
upply
A2
V
DD
—
Powe
rS
upply
A
[0:
31]
High
Input
/O
u
tput
Addres
s
B
u
s
K
eeper
4
A
CK
Low
Input
Ad
dress
T
e
rminat
ion
K
eeper
Mus
tbe
a
c
ti
ve
ly
drive
n
4,
AB
B
Low
Input
/O
u
tput
—
K
eeper
5
K
Pullup
required
t
o
O
V
DD
4,
AG
ND
—
Powe
rS
upply
AP[
0:
3
]
High
Input
/O
u
tput
—
K
eeper
4
AR
T
R
Y
Low
Input
/O
u
tput
Ad
dress
T
e
rminat
ion
K
eeper
5
K
Pullup
required
t
o
O
V
DD
4,
BG
Low
Input
A
ddress
Ar
bit
rat
ion
K
eeper
Ac
ti
ve
driver
or
pull
d
o
w
n
,4,
BR
Low
O
u
tput
A
ddress
Ar
bit
rat
ion
K
eeper
Chip
a
c
ti
vely
drive
s
5
B
V
S
E
L
N
/A
Input
Mode
Select
/C
ont
rol
5
K
Pullup/
pull
dow
n,
as
required
CH
E
C
K
S
T
O
P
Low
O
u
tput
In
te
rrupt
/R
es
et
s
K
eeper
5
K
Pullup
required
t
o
O
V
DD
4,
CI
Low
O
u
tput
T
rans
fe
rAt
tr
ib
u
tes
K
eeper
3,
CK
S
T
P
_
IN
Low
Input
In
te
rrupt
/R
es
et
s
K
eeper
Mus
t
be
a
c
ti
ve
ly
drive
n
5
CLK
_
O
U
T
High
O
u
tput
—
K
eeper
4
DB
B
Low
Input
/O
u
tput
—
K
eeper
5
K
Pullup
required
t
o
O
V
DD
4,
DB
DI
S
Low
Input
Mode
Select
/C
ont
rol
K
eeper
4,
DB
G
Low
Input
Dat
a
A
rbit
rat
ion
K
eeper
Ac
ti
ve
driver
or
t
ie
l
o
w
,4,
No
te
s:
1.
D
epends
on
the
s
yst
em
design.
T
he
el
e
c
tr
ic
al
char
act
e
rist
ic
s
of
t
he
750G
L
do
not
add
addi
ti
onal
c
onst
raint
s
to
t
he
s
yst
em
des
ign
,so
what
ever
is
d
one
wit
h
t
he
net
w
ill
de
pend
on
t
he
sy
st
e
m
requiremen
ts.
2.
H
R
ES
ET
,S
R
ES
ET
,and
T
R
S
T
are
signals
used
f
o
r
RI
SCW
a
tc
h
to
enab
le
proper
operat
ion
of
the
debuggers.
Lo
gi
c
a
lAN
D
gat
es
should
be
placed
bet
ween
these
s
ignals
an
d
t
he
I
B
M
P
o
werP
C
750G
L
RI
S
C
M
icropr
ocess
o
r(
s
ee
3.
T
he
750G
L
pr
ovides
pr
ot
ect
ion
f
rom
m
e
ta
-st
abil
it
y
on
input
s
t
h
rough
t
he
use
of
a
“k
eeper”
c
ir
c
uit
on
s
pecif
ic
input
s
(see
f
o
ra
mor
e
det
ailed
des
crip-
ti
on).
4.
If
a
sys
te
m
design
requires
a
signal
level
t
o
be
maint
a
ined
while
not
being
act
ively
driv
en,
an
ex
te
rnal
resist
or
device
m
ust
be
us
ed
(kee
pers
as
sure
no
met
a
-st
abili
ty
of
input
s
but
do
not
guarant
ee
a
level).
5.
T
he
750G
L
does
not
r
equire
ex
te
rn
al
pullup
s
on
addr
ess
and
dat
a
lines
.
Cont
ro
l
lines
m
u
st
be
t
reat
ed
individually
.
6.
M
ode
Select
/C
on
tr
ol
pi
ns
r
equi
re
t
he
pr
oper
s
tat
e
a
tHRES
E
T
to
c
onf
igure
the
oper
at
ing
mode
of
t
he
proc
essor
(se
e
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