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| 型號(hào)： | HYB25D128400AT |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | 128 Mbit Double Data Rate SDRAM |
| 中文描述： | 128兆雙倍數(shù)據(jù)速率SDRAM |
| 文件頁(yè)數(shù)： | 27/79頁(yè) |
| 文件大?。?/td> | 2596K |
| 代理商： | HYB25D128400AT |
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HYB25D128[400/800/160]A-[6/7/8]
128Mbit Double Data Rate SDRAM
Functional Description
Data Sheet
27
Rev. 1.06, 2004-01
09192003-LFQ1-R60G
issued until
t
RP
is met. Note that part of the row precharge time is hidden during the access of the last data
elements.
In the case of a Read being executed to completion, a Precharge command issued at the optimum time (as
described above) provides the same operation that would result from the same Read burst with Auto Precharge
enabled. The disadvantage of the Precharge command is that it requires that the command and address busses
be available at the appropriate time to issue the command. The advantage of the Precharge command is that it
can be used to truncate bursts.
Figure 13
Terminating a Read Burst: CAS Latencies (Burst Length = 8)
CAS Latency = 2
NOP
BST
NOP
NOP
NOP
Read
CK
Command
Address
DQS
DQ
DO a-n = data out from bank a, column n.
Cases shown are bursts of 8 terminated after 4 data elements.
3 subsequent elements of data out appear in the programmed order following DO a-n.
Shown with nominal t
AC
, t
DQSCK
, and t
DQSQ
.
DOa-n
Don’t Care
CK
BAa, COL n
CL=2
CAS Latency = 2.5
NOP
BST
NOP
NOP
NOP
Read
CK
Command
Address
DQS
DQ
DOa-n
CK
BAa, COL n
CL=2.5
No further output data after this point.
DQS tristated.
No further output data after this point.
DQS tristated.
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| HYB25D128400AT-6 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:128 Mbit Double Data Rate SDRAM |
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| HYB25D128400ATL-6 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:128 Mbit Double Data Rate SDRAM |
| HYB25D128400ATL-7 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:128 Mbit Double Data Rate SDRAM |
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