參數(shù)資料
型號(hào): HYB25D128400AT
廠商: INFINEON TECHNOLOGIES AG
英文描述: 128 Mbit Double Data Rate SDRAM
中文描述: 128兆雙倍數(shù)據(jù)速率SDRAM
文件頁數(shù): 24/79頁
文件大?。?/td> 2596K
代理商: HYB25D128400AT
HYB25D128[400/800/160]A-[6/7/8]
128Mbit Double Data Rate SDRAM
Functional Description
Data Sheet
24
Rev. 1.06, 2004-01
09192003-LFQ1-R60G
Figure 10
Consecutive Read Bursts: CAS Latencies (Burst Length = 4 or 8)
CAS Latency = 2
NOP
Read
NOP
NOP
NOP
Read
CK
CK
Command
Address
DQS
DQ
CL=2
BAa, COL n
BAa, COL b
Don’t Care
DO a-n (or a-b) = data out from bank a, column n (or bank a, column b).
When burst length = 4, the bursts are concatenated.
When burst length = 8, the second burst interrupts the first.
3 subsequent elements of data out appear in the programmed order following DO a-n.
3 (or 7) subsequent elements of data out appear in the programmed order following DO a-b.
Shown with nominal t
AC
, t
DQSCK
, and t
DQSQ
.
CAS Latency = 2.5
NOP
Read
NOP
NOP
NOP
Read
CK
CK
Command
Address
DQS
DQ
CL=2.5
BAa, COL n
BAa,COL b
DOa-n
DOa- n
DOa- b
DOa-b
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