參數(shù)資料
型號： HC805P18GRS
英文描述： 68HC805P18 Technical Data
中文描述： 68HC805P18技術(shù)數(shù)據(jù)
文件頁數(shù)： 92/111頁
文件大?。?/td> 748K
代理商： HC805P18GRS
GENERAL RELEASE SPECIFICATION
MOTOROLA
12-12
INSTRUCTION SET
MC68HC805P18
Rev. 1.0
NEG opr
NEGA
NEGX
NEG oprX
NEG ,X
NOP
Negate Byte
(Two’s Complement)
M
←
–(M) = $00 – (M)
A
←
–(A) = $00 – (A)
X
←
–(X) = $00 – (X)
M
←
–(M) = $00 – (M)
M
←
–(M) = $00 – (M)
— —
¤
¤
¤
DIR
INH
INH
IX1
IX
30
40
50
60
70
ii
ff
5
3
3
6
5
No Operation
— — — — —
INH
9D
2
ORA #opr
ORA opr
ORA opr
ORA oprX
ORA oprX
ORA ,X
ROL opr
ROLA
ROLX
ROL oprX
ROL ,X
ROR opr
RORA
RORX
ROR oprX
ROR ,X
RSP
Logical OR
Accumulator with
Memory
A
←
(A)
∨
(M)
— —
¤
¤
—
IMM
DIR
EXT
IX2
IX1
IX
DIR
INH
INH
IX1
IX
DIR
INH
INH
IX1
IX
INH
AA
BA
CA
DA
EA
FA
39
49
59
69
79
36
46
56
66
76
9C
ii
dd
hh ll
ee ff
ff
2
3
4
5
4
3
5
3
3
6
5
5
3
3
6
5
2
Rotate Byte Left
through Carry Bit
— —
¤
¤
¤
dd
ff
Rotate Byte Right
through Carry Bit
— —
¤
¤
¤
dd
ff
Reset Stack Pointer
SP
←
$00FF
— — — — —
RTI
Return from Interrupt
SP
←
(SP) + 1; Pull (CCR)
SP
←
(SP) + 1; Pull (A)
SP
←
(SP) + 1; Pull (X)
SP
←
(SP) + 1; Pull (PCH)
SP
←
(SP) + 1; Pull (PCL)
SP
←
(SP) + 1; Pull (PCH)
SP
←
(SP) + 1; Pull (PCL)
¤
¤
¤
¤
¤
INH
80
6
RTS
Return from
Subroutine
INH
SBC #opr
SBC opr
SBC opr
SBC oprX
SBC oprX
SBC ,X
SEC
SEI
STA opr
STA opr
STA oprX
STA oprX
STA ,X
Subtract Memory
Byte and Carry Bit
from Accumulator
A
←
(A) – (M) – (C)
— —
¤
¤
¤
IMM
DIR
EXT
IX2
IX1
IX
INH
INH
DIR
EXT
IX2
IX1
IX
A2
B2
C2
D2
E2
F2
99
9B
B7
C7
D7
E7
F7
ii
dd
hh ll
ee ff
ff
2
3
4
5
4
3
2
2
4
5
6
5
4
Set Carry Bit
Set Interrupt Mask
C
←
1
I
←
1
— — — — 1
— 1 — — —
Store Accumulator in
Memory
M
←
(A)
— —
¤
¤
—
dd
hh ll
ee ff
ff
STOP
Stop Oscillator and
Enable IRQ Pin
— 0 — — —
INH
8E
2
Table 12-6. Instruction Set Summary (Continued)
Source
Form
Operation
Description
Effect on
CCR
A
M
O
O
C
H I N Z C
C
b0
b7
b0
b7
C
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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