參數(shù)資料
型號(hào)： HC805P18GRS
英文描述： 68HC805P18 Technical Data
中文描述： 68HC805P18技術(shù)數(shù)據(jù)
文件頁數(shù)： 30/111頁
文件大?。?/td> 748K
代理商： HC805P18GRS
GENERAL RELEASE SPECIFICATION
MC68HC805P18
Rev. 1.0
INTERRUPTS
MOTOROLA
4-3
8
2
3
4
5
6
7
8
9
10
11
12
13
14
A
16
17
18
19
20
Figure 4-1. Interrupt Processing Flowchart
External Interrupt (IRQ)
The IRQ pin drives an asynchronous interrupt to the CPU. An edge detector
flip-flop is latched on the falling edge of IRQ. If either the output from the internal
edge detector flip-flop or the level on the IRQ pin is low, a request is
synchronized to the CPU to generate the IRQ interrupt. If the edge-sensitive
only option is selected, the output of the internal edge detector flip-flop is
sampled and the input level on the IRQ pin is ignored. If port A interrupts are
IS I BIT
SET
FROMRESET
LOAD PC FROM:
SWI: $3FFC, $3FFD
IRQ: $3FFA-$3FFB
TIMER: $3FF8-$3FF9
SET
I BIT IN CCR
STACK
PC, X, A, CC
CLEAR IRQ
REQUEST
LATCH
RESTORE RESISTERS
FROMSTACK
CC, A, X, PC
Y
N
EXECUTE INSTRUCTION
FETCH NEXT
INSTRUCTION
IRQ
INTERRUPT
Y
N
TIMER
INTERRUPT
Y
N
SWI
INSTRUCTION
Y
N
RTI
INSTRUCTION
Y
N
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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