參數(shù)資料
型號: GCIXP1250-166
英文描述: Microprocessor
中文描述: 微處理器
文件頁數(shù): 27/148頁
文件大小: 1601K
代理商: GCIXP1250-166
Intel
IXP1250 Network Processor
Datasheet
27
3.2
Pin Type Legend
The IXP1250 signals are categorized into one of several groups: Processor Support,
Miscellaneous/Test, IEEE 1149.1, SRAM Interface, SDRAM Interface, IX Bus Interface, General
Purpose, Serial Port, and PCI Interface.
Table 11
defines the signal type abbreviations used in the Pin Description section.
Table 11. Signal Type Abbreviations
Signal Type
Description
I
Standard input only. There are three types of inputs (I1,I2, and I3) for the IXP1250. Refer to
Table 35
and
Table 36
for more information.
O
Standard output only. There are 5 types of outputs (O1,O2,O3,O4, O5) for the IXP1250. Refer
to
Table 35
and
Table 36
for more information.
TS
Tri-state output.
STS
Sustained tri-state. Active low signal owned and driven by one and only one agent at a time.
The agent that drives this pin low must drive it high for at least one clock before letting it float.
A new agent cannot start driving this signal any sooner than one clock after the previous owner
tri-states it. A pullup is required to sustain the inactive state until another agent drives it, and it
must be provided by the central resource (that is, on a PC board).
P
Power supply.
OD
Standard open drain allows multiple devices to share as a wire-OR. A pullup is required to
sustain the inactive state until another agent drives it, and it must be provided by the central
resource.
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