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    參數(shù)資料
    型號: DSPB56007FJ50
    英文描述: DSP|24-BIT|CMOS|QFP|80PIN|PLASTIC
    中文描述: 數(shù)字信號處理器| 24位|的CMOS | QFP封裝| 80腳|塑料
    文件頁數(shù): 14/83頁
    文件大?。?/td> 382K
    代理商: DSPB56007FJ50
    1-8
    DSP56007/D
    MOTOROLA
    Signal/Connection Descriptions
    Interrupt and Mode Control
    MODB
    IRQB
    Input
    Input (MODB)
    Mode Select B
    —This input signal has two functions:
    to work with the MODA and MODC signals to select
    the DSP’s initial operating mode, and
    to allow an external device to request a DSP
    interrupt after internal synchronization.
    MODB is read and internally latched in the DSP when the
    processor exits the Reset state. The logic state present on the
    MODA, MODB, and MODC pins selects the initial DSP
    operating mode. Several clock cycles after leaving the Reset
    state, the MODB signal changes to the external interrupt
    request IRQB. The DSP operating mode can be changed by
    software after reset.
    External Interrupt Request
    B (IRQB
    )—The IRQB input is a
    synchronized external interrupt request. It may be
    programmed to be level-sensitive or negative-edge-
    triggered. When the signal is edge-triggered, triggering
    occurs at a voltage level and is not directly related to the fall
    time of the interrupt signal. However, as the fall time of the
    interrupt signal increases, the probability that noise on IRQB
    will generate multiple interrupts also increases. Hardware
    reset causes this input to function as MODB.
    Table 1-7
    Interrupt and Mode Control Signals (Continued)
    Signal Name
    Signal
    Type
    State during
    Reset
    Signal Description
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