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參數(shù)資料
| 型號： | DSP56F805 |
| 廠商： | 飛思卡爾半導(dǎo)體(中國)有限公司 |
| 英文描述： | 16-bit Hybrid Controller(16位混合控制器) |
| 中文描述： | 16位混合控制器（16位混合控制器） |
| 文件頁數(shù)： | 46/48頁 |
| 文件大小： | 967K |
| 代理商： | DSP56F805 |
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46
56F805 Technical Data
Use the value obtained by the equation (T
J
– T
T
)/P
D
where T
T
is the temperature of the package
case determined by a thermocouple.
The thermal characterization parameter is measured per JESD51-2 specification using a 40-gauge type T
thermocouple epoxied to the top center of the package case. The thermocouple should be positioned so that
the thermocouple junction rests on the package. A small amount of epoxy is placed over the thermocouple
junction and over about 1mm of wire extending from the junction. The thermocouple wire is placed flat
against the package case to avoid measurement errors caused by cooling effects of the thermocouple wire.
When heat sink is used, the junction temperature is determined from a thermocouple inserted at the
interface between the case of the package and the interface material. A clearance slot or hole is normally
required in the heat sink. Minimizing the size of the clearance is important to minimize the change in
thermal performance caused by removing part of the thermal interface to the heat sink. Because of the
experimental difficulties with this technique, many engineers measure the heat sink temperature and then
back-calculate the case temperature using a separate measurement of the thermal resistance of the
interface. From this case temperature, the junction temperature is determined from the junction-to-case
thermal resistance.
5.2 Electrical Design Considerations
Use the following list of considerations to assure correct operation:
Provide a low-impedance path from the board power supply to each V
DD
pin on the hybrid
controller, and from the board ground to each V
SS
pin.
The minimum bypass requirement is to place 0.1
μ
F capacitors positioned as close as possible to the
package supply pins. The recommended bypass configuration is to place one bypass capacitor on
each of the V
DD
/V
SS
pairs, including V
DDA
/V
SSA.
Ceramic and tantalum capacitors tend to provide
better performance tolerances.
Ensure that capacitor leads and associated printed circuit traces that connect to the chip V
DD
and
V
SS
pins are less than 0.5 inch per capacitor lead.
Bypass the V
DD
and V
SS
layers of the PCB with approximately 100
μ
F, preferably with a high-grade
capacitor such as a tantalum capacitor.
Because the DSP output signals have fast rise and fall times, PCB trace lengths should be minimal.
CAUTION
This device contains protective circuitry to guard against
damage due to high static voltage or electrical fields.
However, normal precautions are advised to avoid
application of any voltages higher than maximum rated
voltages to this high-impedance circuit. Reliability of
operation is enhanced if unused inputs are tied to an
appropriate voltage level.
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| DSP56F805ACIM | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Targeting Document for the 56F805 3-Phase AC Induction Motor V/Hz Control |
| DSP56F805BLDCQE | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Targeting Document for the 56F805 BLDC Motor Control Application with Quadrature Encoder |
| DSP56F805D | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:16-bit Hybrid Controller |
| DSP56F805E | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers |
| DSP56F805EVM | 功能描述:開發(fā)板和工具包 - 其他處理器 Evaluation Kit For DSP56F805 RoHS:否 制造商:Freescale Semiconductor 產(chǎn)品:Development Systems 工具用于評估:P3041 核心:e500mc 接口類型:I2C, SPI, USB 工作電源電壓: |
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