參數(shù)資料
型號(hào)： DSP56F805
廠商： 飛思卡爾半導(dǎo)體(中國(guó))有限公司
英文描述： 16-bit Hybrid Controller(16位混合控制器)
中文描述： 16位混合控制器（16位混合控制器）
文件頁(yè)數(shù)： 35/48頁(yè)
文件大?。?/td> 967K
代理商： DSP56F805
Quad Timer Timing
56F805 Technical Data
35
3.9 Quad Timer Timing
3.10 Quadrature Decoder Timing
Table 33. Quadrature Decoder Timing
1, 2
Operating Conditions:
V
SS
= V
SSA
= 0 V, V
DD
= V
DDA
= 3.0–3.6V, T
A
= –40
°
to +85
°
C, C
L
≤
50pF, f
OP
= 80MHz
Table 32. Timer Timing
1, 2
Operating Conditions:
V
SS
= V
SSA
= 0 V, V
DD
= V
DDA
= 3.0–3.6V, T
A
= –40
°
to +85
°
C, C
L
≤
50pF, f
OP
= 80MHz
1.
2.
In the formulas listed, T = clock cycle. For 80MHz operation, T = 12.5ns.
Parameters listed are guaranteed by design.
Characteristic
Symbol
Min
Max
Unit
Timer input period
P
IN
4T+6
—
ns
Timer input high/low period
P
INHL
2T+3
—
ns
Timer output period
P
OUT
2T
—
ns
Timer output high/low period
P
OUTHL
1T
—
ns
Figure 25. Timer Timing
1.
T
A
= –40
°
to +85
°
C, C
L
≤
50pF.
2.
Parameters listed are guaranteed by design.
In the formulas listed, T = clock cycle. For 80MHz operation, T = 12.5ns. V
SS
= 0V, V
DD
= 3.0–3.6V,
Characteristic
Symbol
Min
Max
Unit
Quadrature input period
P
IN
8T+12
—
ns
Quadrature input high/low period
P
HL
4T+6
—
ns
Quadrature phase period
P
PH
2T+3
—
ns
Timer Inputs
Timer Outputs
P
INHL
P
INHL
P
IN
P
OUTHL
P
OUTHL
P
OUT
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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