參數(shù)資料
型號： DSF10K
廠商： Altera Corporation
英文描述： EMBEDDED PROGRAMMABLE LOGIC FAMILY
中文描述： 嵌入式可編程邏輯系列
文件頁數(shù)： 51/138頁
文件大?。?/td> 2116K
代理商： DSF10K
Altera Corporation
51
FLEX 10K Embedded Programmable Logic Family Data Sheet
Notes to tables:
(1)
See the
Operating Requirements for Altera Devices Data Sheet
.
(2)
Minimum DC voltage input is –0.5 V. During transitions, the inputs may undershoot to –2.0 V or overshoot to
5.75 V for input currents less than 100 mA and periods shorter than 20 ns.
(3)
Numbers in parentheses are for industrial-temperature-range devices.
(4)
Maximum V
CC
rise time is 100 ms, and V
CC
must rise monotonically.
(5)
FLEX 10KA device inputs may be driven before V
CCINT
and V
CCIO
are powered.
(6)
Typical values are for T
A
= 25
°
C and V
CC
= 3.3 V.
(7)
These values are specified under
Table 27
on
page 49
.
(8)
The I
OH
parameter refers to high-level TTL, PCI, or CMOS output current.
(9)
The I
OL
parameter refers to low-level TTL, PCI, or CMOS output current. This parameter applies to open-drain pins
as well as output pins.
(10) This parameter applies to all -1 speed grade commercial temperature devices and all -2 speed grade
industrial-temperature devices.
(11) Capacitance is sample-tested only.
Figure 22
shows the typical output drive characteristics of EPF10K10A,
EPF10K30A, EPF10K100A, and EPF10K250A devices with 3.3-V and 2.5-V
V
CCIO
. The output driver is compliant with the 3.3-V
PCI Local Bus
Specification
,
Revision 2.2
(with 3.3-V V
CCIO
). Moreover, device analysis
shows that the EPF10K10A, EPF10K30A, and EPF 10K100A devices can
drive a 5.0-V PCI bus with eight or fewer loads.
Table 29. 3.3-V Device Capacitance of EPF10K10A & EPF10K30A Devices
Note (11)
Symbol
Parameter
Conditions
Min
Max
Unit
C
IN
C
INCLK
Input capacitance
Input capacitance on dedicated
clock pin
Output capacitance
V
IN
= 0 V, f = 1.0 MHz
V
IN
= 0 V, f = 1.0 MHz
8
pF
pF
12
C
OUT
V
OUT
= 0 V, f = 1.0 MHz
8
pF
Table 30. 3.3-V Device Capacitance of EPF10K100A Devices
Note (11)
Symbol
Parameter
Conditions
Min
Max
Unit
C
IN
C
INCLK
Input capacitance
Input capacitance on dedicated
clock pin
Output capacitance
V
IN
= 0 V, f = 1.0 MHz
V
IN
= 0 V, f = 1.0 MHz
10
15
pF
pF
C
OUT
V
OUT
= 0 V, f = 1.0 MHz
10
pF
Table 31. 3.3-V Device Capacitance of EPF10K250A Devices
Note (11)
Symbol
Parameter
Conditions
Min
Max
Unit
C
IN
C
INCLK
Input capacitance
Input capacitance on dedicated
clock pin
Output capacitance
V
IN
= 0 V, f = 1.0 MHz
V
IN
= 0 V, f = 1.0 MHz
10
15
pF
pF
C
OUT
V
OUT
= 0 V, f = 1.0 MHz
10
pF
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