參數(shù)資料
型號: DSF10K
廠商: Altera Corporation
英文描述: EMBEDDED PROGRAMMABLE LOGIC FAMILY
中文描述: 嵌入式可編程邏輯系列
文件頁數(shù): 123/138頁
文件大?。?/td> 2116K
代理商: DSF10K
Altera Corporation
123
FLEX 10K Embedded Programmable Logic Family Data Sheet
Figure 32. I
CCACTIVE
vs. Operating Frequency (Part 3 of 3)
EPF10K250A
Configuration &
Operation
The FLEX 10K architecture supports several configuration schemes. This
section summarizes the device operating modes and available device
configuration schemes.
f
See
Application Note 59 (Configuring FLEX 10K Devices)
for detailed
descriptions of device configuration options, device configuration pins,
and for information on configuring FLEX 10K devices, including sample
schematics, timing diagrams, and configuration parameters.
Operating Modes
The FLEX 10K architecture uses SRAM configuration elements that
require configuration data to be loaded every time the circuit powers up.
The process of physically loading the SRAM data into the device is called
configuration
. During initialization, which occurs immediately after
configuration, the device resets registers, enables I/O pins, and begins to
operate as a logic device. The I/O pins are tri-stated during power-up,
and before and during configuration. Together, the configuration and
initialization processes are called
command mode
is called
user mode
.
SRAM configuration elements allow FLEX 10K devices to be reconfigured
in-circuit by loading new configuration data into the device. Real-time
reconfiguration is performed by forcing the device into command mode
with a device pin, loading different configuration data, reinitializing the
device, and resuming user-mode operation.
0
Frequency (MHz)
3,500
3,000
2,500
2,000
1,500
1,000
500
20
40
60
100
80
I
Supply
Current (mA)
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