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參數(shù)資料
| 型號： | DS80CH11 |
| 廠商： | DALLAS SEMICONDUCTOR |
| 元件分類： | Microcontroller |
| 英文描述： | 8-BIT, MICROCONTROLLER, PQFP128 |
| 封裝： | TQFP-128 |
| 文件頁數(shù)： | 85/88頁 |
| 文件大?。?/td> | 598K |
| 代理商： | DS80CH11 |
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DS80CH11
011200 86/88
13.6 2–WIRE AC TIMING CHARACTERISTICS
(0
°C to 70°C; VCC=5.0 ± 10%)
PARAMETER
SYMBOL
INPUT
OUTPUT
START Condition Hold Time
tSTAH
> 14 tCLK (4)
> 1.0
s(1)
SCLx Low Time
tSCL
> 16 tCLK (4)
> 1.3
s(1)
SCLx High Time
tSCH
> 14 tCLK (4)
> 0.6
s(1)
SCLx, SDAx Rise Time
tSR
< 300 ns(1)
– (2)
SCLx, SDAx Fall Time
tSF
< 300 ns(3)
< 300 ns
Data Setup Time
t2DS
> 100 ns
> 250 ns(1)
Data Hold Time
t2DH
> 0 ns
> 8 tCLK – tSF (4)
Repeated START Setup Time
tRSTA
> 14 tCLK (4)
> 600 ns(1)
Repeated STOP Setup Time
tRSTO
> 14 tCLK (4)
> 600 ns(1)
Bus Free Time
t2BF
> 14 tCLK (4)
> 1.3
s(1)
NOTES:
1. At 400Kbps. For other bit rates this value is multiplied by 400 / f2W.
2. Determined by the external bus line capacitance and the external bus line pull–up resistor; this must be < 300 ns
@ 400Kbps.
3. Spikes on the SDAx and SCLx lines with a duration of less than 50 ns will be filtered out. Maximum capacitance
on either SDAx and SCLx = 400 pF.
4. Where tCLK is the period of the XTAL oscillator and the instruction cycle rate is set to 4 clocks (default). The fre-
quency of the XTAL oscillator should be greater than 5 MHz for 400Kbps operation.
5. Both 2–Wire ports are identical and therefore only SDAx and SCLx are used here to simplify all notations.
SDAx = SDA1 or SDA2 and SCLx = SCL1 or SCL2 (“x” = 1 or 2).
2–WIRE SERIAL I/O TIMING Figure 13–12
tRSTO
tSF
tSR
tRSTA
t2DH
t2DS
t2BF
t2DS
tSTAH
tSR
tSF
tSCL
tSCH
SDAx
SCLx
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