參數(shù)資料
型號: DS80CH11
廠商: DALLAS SEMICONDUCTOR
元件分類: Microcontroller
英文描述: 8-BIT, MICROCONTROLLER, PQFP128
封裝: TQFP-128
文件頁數(shù): 15/88頁
文件大?。?/td> 598K
代理商: DS80CH11
DS80CH11
011200 22/88
3.6
INTERRUPT CONTROL
The SEM provides 16 sources of interrupt with three
priority levels.
The Power–fail Interrupt (PFI), if
enabled, always has the highest priority. There are two
remaining user selectable priorities: high and low. If two
interrupts that have the same priority occur simulta-
neously, the hardware–determined precedence given
below determines which is a acted upon. Except for the
PFI, all interrupts that are new to the 8051 family have a
lower natural priority than the originals.
INTERRUPT PRIORITY Table 3–2
NAME
DESCRIPTION
VECTOR
NATURAL
PRIORITY
8051/DALLAS
PFI
Power Fail Interrupt
33h
1
DALLAS
INT0
External Interrupt 0
03h
2
8051
TF0
Timer 0
0Bh
3
8051
INT1
External Interrupt 1
13h
4
8051
TF1
Timer 1
1Bh
5
8051
SCON0
TI0 or RI0 from Serial Port 0
23h
6
8051
TF2
Timer 2
2Bh
7
8051
AMI
Activity Monitor Interrupt
3Bh
8
DALLAS
2WI1
2–Wire Serial Port 1
43h
9
DALLAS
ADI
A/D End of Conversion
4Bh
10
DALLAS
2WI2
2–Wire Serial Port 2
53h
11
DALLAS
KBI
Keyboard Buffer Input
5Bh
12
DALLAS
PBI1
Power Mgmt. Buffer Input #1
63h
13
DALLAS
KDI
Key Detect Input
6Bh
14
DALLAS
WDI
WatchDog Periodic Interrupt
73h
15
DALLAS
PBI2
Power Mgmt. Buffer Input #2
7Bh
16
DALLAS
INTERRUPT CONTROL SUMMARY Table 3–3
INTERRUPT
SOURCE
FLAG(S)
FLAG
LOC.
ENABLE
LOC.
PRIORITY
LOC.
Power Fail
PFI
WDCON.4
EPFI
WDCON.5
N/A
External 0
IE0
TCON.1
EX0
IE.0
PX0
IP.0
Timer 0
TF0
TCON.5
ET0
IE.1
PT0
IP.1
External 1
IE1
TCON.3
EX1
IE.2
PX1
IP.2
Timer 1
TF1
TCON.7
ET1
IE.3
PT1
IP.3
Serial Port 0
RI0,TI0
SCON0.0/
SCON0.1
ES0
IE.4
PS0
IP.4
Timer 2
TF2
T2CON.7
ET2
IE.5
PT2
IP.5
Activity monitor
AMF7–0
AMF.7–0
EAM
IE.6
PAM
IP.6
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