
DS80CH11
011200 80/88
EXTERNAL DATA MEMORY READ CYCLE Figure 13–2
ALE
PSEN
RD
PORT 0
PORT 2
ADDRESS A8–A15 OUT
DATA IN
INSTRUCTION
IN
ADDRESS
A0–A7
ADDRESS
A0–A7
tLLDV
tWHLH
tAVWL1
tAVDV2
tRLRH
tRLDV
tRHDZ
tRHDX
tAVLL
tRLAZ
tLLWL
tLLAX1
tLHLL2
tAVDV1
tAVWL2
EXTERNAL DATA MEMORY WRITE CYCLE Figure 13–3
ALE
WR
PSEN
PORT 0
PORT 2
ADDRESS A8–A15 OUT
DATA OUT
ADDRESS
INSTRUCTION
tWLWH
tAVWL1
tWHQX
tAVLL
tLLAX2
tLLWL
tWHLH
tQVWX
IN
A0–A7
tAVWL2