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| 型號： | DEMO9RS08KA2 |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 79/136頁 |
| 文件大?。?/td> | 0K |
| 描述： | DEMO BOARD FOR 9RS08KA2 |
| 產(chǎn)品培訓模塊： | Mechatronics USBSpyder08 Discovery Kit RS08KA2 Low-End Microcontroller Series MC9RS08KA8 Microcontroller |
| 標準包裝： | 1 |
| 系列： | RS08 |
| 類型： | MCU |
| 適用于相關(guān)產(chǎn)品： | MC9RS08KA2 |
| 所含物品： | 板，線纜，CD，文檔，樣品 IC |
| 產(chǎn)品目錄頁面： | 730 (CN2011-ZH PDF) |
| 相關(guān)產(chǎn)品： | MC9RS08KA2CSCRTR-ND - IC MCU 8BIT 2K FLASH 8-SOIC PC9RS08KA2PAE-ND - MCU 8BIT 2KB FLASH RS08 8-DIP PC9RS08KA2FPE-ND - MCU 8BIT 2KB FLASH RS08 6-VDFN PC9RS08KA2DWE-ND - MCU 8BIT 2KB FLASH RS08 8-SOIC MC9RS08KA2CPC-ND - IC MCU 8-BIT 2K FLASH 8-PDIP MC9RS08KA2CDB-ND - IC MCU 8-BIT 2K FLASH 6-DFN MC9RS08KA2CSC-ND - IC MCU 8-BIT 2K FLASH 8-SOIC |
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Chapter 6 Parallel Input/Output Control
MC9RS08KA2 Series Data Sheet, Rev. 4
Freescale Semiconductor
47
6.3
Pin Control Registers
This section provides information about the registers associated with the parallel I/O ports that are used
for pin control functions.
Refer to tables in Chapter 4, “Memory,” for the absolute address assignments of the pin control registers.
This section refers to registers and control bits only by their names. A Freescale Semiconductor-provided
equate or header file normally is used to translate these names into the appropriate absolute addresses.
6.3.1
Port A Pin Control Registers
The pins associated with port A are controlled by the registers provided in this section. These registers
control the pin pullup/pulldown and slew rate of the port A pins independent of the parallel I/O registers.
6.3.1.1
Internal Pulling Device Enable
An internal pulling device can be enabled for each port pin by setting the corresponding bit in the pulling
device enable register (PTAPEn). The pulling device is disabled if the pin is configured as an output by the
parallel I/O control logic or any shared peripheral output function regardless of the state of the
Table 6-1. PTAD Register Field Descriptions
Field
Description
5:0
PTAD[5:0]
Port A Data Register Bits — For port A pins that are inputs, reads return the logic level on the pin. For port A
pins that are configured as outputs, reads return the last value written to this register. Writes are latched into all
bits of this register. For port A pins that are configured as outputs, the logic level is driven out the corresponding
MCU pin.
Reset forces PTAD to all 0s, but these 0s are not driven out the corresponding pins because reset also configures
all port pins as high-impedance inputs with pullup/pulldowns disabled.
76
54
321
0
R
00
00
W
Reset:
000
00
000
Figure 6-3. Port A Data Direction Register (PTADD)
Table 6-2. PTADD Register Field Descriptions
Field
Description
5:4,1:0
PTADD[5:4,1:0]
Data Direction for Port A Bits — These read/write bits control the direction of port A pins and what is read
for PTAD reads.
0 Input (output driver disabled) and reads return the pin value.
1 Output driver enabled for port A bit n and PTAD reads return the contents of PTADn.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DEMO9RS08KA8 | 功能描述:開發(fā)板和工具包 - S08 / S12 DEMO BOARD FOR KA8 PRODUCT RoHS:否 產(chǎn)品:Development Kits 工具用于評估:MC9S12G128 核心:S12 接口類型:CAN, LIN, RS-232, USB 工作電源電壓:5 V 制造商:Freescale Semiconductor |
| DEMO9RS08KB12 | 功能描述:開發(fā)板和工具包 - S08 / S12 KB12 DEMO Board RoHS:否 產(chǎn)品:Development Kits 工具用于評估:MC9S12G128 核心:S12 接口類型:CAN, LIN, RS-232, USB 工作電源電壓:5 V 制造商:Freescale Semiconductor |
| DEMO9RS08KB12 | 制造商:Freescale Semiconductor 功能描述:; LEADED PROCESS COMPATIBLE:YES; PEAK RE |
| DEMO9RS08LA8 | 功能描述:開發(fā)板和工具包 - S08 / S12 DEMO BOARD FOR LA8 RoHS:否 產(chǎn)品:Development Kits 工具用于評估:MC9S12G128 核心:S12 接口類型:CAN, LIN, RS-232, USB 工作電源電壓:5 V 制造商:Freescale Semiconductor |
| DEMO9RS08LE4 | 功能描述:開發(fā)板和工具包 - S08 / S12 LE4 Family Demo Board RoHS:否 產(chǎn)品:Development Kits 工具用于評估:MC9S12G128 核心:S12 接口類型:CAN, LIN, RS-232, USB 工作電源電壓:5 V 制造商:Freescale Semiconductor |
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