參數(shù)資料
型號: CYRF69213-40LFXC
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Programmable Radio on Chip Low Power
中文描述: SPECIALTY TELECOM CIRCUIT, QCC40
封裝: 6 X 6 MM, LEAD FREE, M0-220, QFN-40
文件頁數(shù): 67/85頁
文件大?。?/td> 731K
代理商: CYRF69213-40LFXC
CYRF69213
Document #: 001-07552 Rev. *B
Page 67 of 85
Mnemonic
DATA32_THOLD_ADR
Address
0x11
Bit
7
6
5
4
3
2
1
0
Default
-
-
-
-
0
1
0
0
Read/Write
-
-
-
-
R/W
R/W
R/W
R/W
Function
Not Used
Not Used
Not Used
Not Used
TH32
Bits 3:0:
32-chip Data PN Code Correlator Threshold. This register sets the correlator threshold used in DSSS modes when DATA
CODE LENGTH (see TX_CFG_ADR) is set to 32. Typical applications configure TH32 = 05h.
Mnemonic
DATA64_THOLD_ADR
Address
0x12
Bit
7
6
5
4
3
2
1
0
Default
-
-
-
0
1
0
1
0
Read/Write
-
-
-
R/W
R/W
R/W
R/W
R/W
Function
Not Used
Not Used
Not Used
TH64
Bits 4:0
64 Chip Data PN Code Correlator Threshold. This register sets the correlator threshold used in DSSS modes when the DATA
CODE LENGTH (see TX_CFG_ADR) is set to 64. Typical applications configure TH64 = 0Eh.
Mnemonic
RSSI_ADR
Address
0x13
Bit
7
6
5
4
3
2
1
0
Default
0
-
1
0
0
0
0
0
Read/Write
R
-
R
R
R
R
R
R
Function
SOP
Not Used
LNA
RSSI
A Received Signal Strength Indicator (RSSI) reading is taken automatically when an SOP symbol is detected. In addition, an RSSI reading is
taken whenever RSSI_ADR is read. The contents of this register are not valid after the device is configured for receive mode until either a SOP
symbol is detected, or the register is read. The conversion can occur as often as once every 12
μ
s.
To measure the background RF signal strength on a channel before a packet has been received, the MCU should perform a ‘dummy’ read of
this register, the results of which should be discarded. This ‘dummy’ read will cause an RSSI measurement to be taken, and therefore
subsequent readings of the register will yield valid data.
Bit 7
SOP RSSI Reading. When set, this bit indicates that the reading in the RSSI field was taken when a SOP symbol was
detected. When cleared, this bit indicates that the reading stored in the RSSI field was triggered by a previous SPI read of this
register.
Bit 5
LNA State. This bit indicates the LNA state when the RSSI reading was taken. When cleared, this bit indicates that the LNA
was disabled when the RSSI reading was taken; if set, this bit indicates that the LNA was enabled when the RSSI reading was
taken.
Bits 4:0
RSSI Reading. This field indicates the instantaneous strength of the RF signal being received at the time that the RSSI reading
was taken. A larger value indicates a stronger signal. The signal strength measured is for the RF signal on the configured chan-
nel, and is measured after the LNA stage.
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